Add ^ and use CheckOpcode for isSelectPseudo

Author: wangpc-pp

llvm/lib/Target/RISCV/RISCVInstrPredicates.td

@@ -40,23 +40,20 @@ def isZEXT_B
                      CheckImmOperand<2, 255>
                    ]>>>;
 
-// Returns true if this is the zext.b pattern, andi rd, rs1, 255.
 def isSelectPseudo
     : TIIPredicate<"isSelectPseudo",
-                   MCOpcodeSwitchStatement<
-                     [MCOpcodeSwitchCase<
-                        [Select_GPR_Using_CC_GPR,
-                         Select_GPR_Using_CC_Imm,
-                         Select_FPR16_Using_CC_GPR,
-                         Select_FPR16INX_Using_CC_GPR,
-                         Select_FPR32_Using_CC_GPR,
-                         Select_FPR32INX_Using_CC_GPR,
-                         Select_FPR64_Using_CC_GPR,
-                         Select_FPR64INX_Using_CC_GPR,
-                         Select_FPR64IN32X_Using_CC_GPR
-                        ],
-                        MCReturnStatement<TruePred>>],
-                      MCReturnStatement<FalsePred>>>;
+                   MCReturnStatement<
+                     CheckOpcode<[
+                       Select_GPR_Using_CC_GPR,
+                       Select_GPR_Using_CC_Imm,
+                       Select_FPR16_Using_CC_GPR,
+                       Select_FPR16INX_Using_CC_GPR,
+                       Select_FPR32_Using_CC_GPR,
+                       Select_FPR32INX_Using_CC_GPR,
+                       Select_FPR64_Using_CC_GPR,
+                       Select_FPR64INX_Using_CC_GPR,
+                       Select_FPR64IN32X_Using_CC_GPR
+                     ]>>>;
 
 // Returns true if this is a vector configuration instruction.
 def isVectorConfigInstr
@@ -82,43 +79,43 @@ def isFloatScalarMoveOrScalarSplatInstr
     : TIIPredicate<"isFloatScalarMoveOrScalarSplatInstr",
                    MCReturnStatement<
                      CheckOpcode<!listflatten([
-                      !instances<Pseudo>("PseudoVFMV_S_F.*"),
-                      !instances<Pseudo>("PseudoVFMV_V_F.*")
+                      !instances<Pseudo>("^PseudoVFMV_S_F.*"),
+                      !instances<Pseudo>("^PseudoVFMV_V_F.*")
                      ])>>>;
 
 def isScalarExtractInstr
     : TIIPredicate<"isScalarExtractInstr",
                    MCReturnStatement<
                      CheckOpcode<!listflatten([
-                      !instances<Pseudo>("PseudoVMV_X_S.*"),
-                      !instances<Pseudo>("PseudoVFMV_F.*_S.*")
+                      !instances<Pseudo>("^PseudoVMV_X_S.*"),
+                      !instances<Pseudo>("^PseudoVFMV_F.*_S.*")
                      ])>>>;
 
 def isScalarInsertInstr
     : TIIPredicate<"isScalarInsertInstr",
                    MCReturnStatement<
                      CheckOpcode<!listflatten([
-                      !instances<Pseudo>("PseudoVMV_S_X.*"),
-                      !instances<Pseudo>("PseudoVFMV_S_F.*")
+                      !instances<Pseudo>("^PseudoVMV_S_X.*"),
+                      !instances<Pseudo>("^PseudoVFMV_S_F.*")
                      ])>>>;
 
 def isScalarSplatInstr
     : TIIPredicate<"isScalarSplatInstr",
                    MCReturnStatement<
                      CheckOpcode<!listflatten([
-                      !instances<Pseudo>("PseudoVMV_V_I.*"),
-                      !instances<Pseudo>("PseudoVMV_V_X.*"),
-                      !instances<Pseudo>("PseudoVFMV_V_F.*")
+                      !instances<Pseudo>("^PseudoVMV_V_I.*"),
+                      !instances<Pseudo>("^PseudoVMV_V_X.*"),
+                      !instances<Pseudo>("^PseudoVFMV_V_F.*")
                      ])>>>;
 
 def isVSlideInstr
     : TIIPredicate<"isVSlideInstr",
                    MCReturnStatement<
                      CheckOpcode<!listflatten([
-                      !instances<Pseudo>("PseudoVSLIDEDOWN_VX.*"),
-                      !instances<Pseudo>("PseudoVSLIDEDOWN_VI.*"),
-                      !instances<Pseudo>("PseudoVSLIDEUP_VX.*"),
-                      !instances<Pseudo>("PseudoVSLIDEUP_VI.*")
+                      !instances<Pseudo>("^PseudoVSLIDEDOWN_VX.*"),
+                      !instances<Pseudo>("^PseudoVSLIDEDOWN_VI.*"),
+                      !instances<Pseudo>("^PseudoVSLIDEUP_VX.*"),
+                      !instances<Pseudo>("^PseudoVSLIDEUP_VI.*")
                      ])>>>;
 
 def isNonZeroLoadImmediate
@@ -136,8 +133,8 @@ def ignoresVXRM
                    MCOpcodeSwitchStatement<
                      [MCOpcodeSwitchCase<
                         !listflatten([
-                          !instances<Pseudo>("PseudoVNCLIP_WI.*"),
-                          !instances<Pseudo>("PseudoVNCLIPU_WI.*")
+                          !instances<Pseudo>("^PseudoVNCLIP_WI.*"),
+                          !instances<Pseudo>("^PseudoVNCLIPU_WI.*")
                         ]),
                         MCReturnStatement<CheckImmOperand<3, 0>>>],
                       MCReturnStatement<FalsePred>>>;