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IcohedronIcohedron
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Implement reflect HLSL function
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12 files changed

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‎clang/include/clang/Basic/BuiltinsSPIRV.td

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,3 +19,9 @@ def SPIRVLength : Builtin {
1919
let Attributes = [NoThrow, Const];
2020
let Prototype = "void(...)";
2121
}
22+
23+
def SPIRVReflect : Builtin {
24+
let Spellings = ["__builtin_spirv_reflect"];
25+
let Attributes = [NoThrow, Const];
26+
let Prototype = "void(...)";
27+
}

‎clang/lib/CodeGen/CGBuiltin.cpp

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -20538,6 +20538,19 @@ Value *CodeGenFunction::EmitSPIRVBuiltinExpr(unsigned BuiltinID,
2053820538
/*ReturnType=*/X->getType()->getScalarType(), Intrinsic::spv_length,
2053920539
ArrayRef<Value *>{X}, nullptr, "spv.length");
2054020540
}
20541+
case SPIRV::BI__builtin_spirv_reflect: {
20542+
Value *I = EmitScalarExpr(E->getArg(0));
20543+
Value *N = EmitScalarExpr(E->getArg(1));
20544+
assert(E->getArg(0)->getType()->hasFloatingRepresentation() &&
20545+
E->getArg(1)->getType()->hasFloatingRepresentation() &&
20546+
"Reflect operands must have a float representation");
20547+
assert(E->getArg(0)->getType()->isVectorType() &&
20548+
E->getArg(1)->getType()->isVectorType() &&
20549+
"Reflect operands must be a vector");
20550+
return Builder.CreateIntrinsic(
20551+
/*ReturnType=*/I->getType(), Intrinsic::spv_reflect,
20552+
ArrayRef<Value *>{I, N}, nullptr, "spv.reflect");
20553+
}
2054120554
}
2054220555
return nullptr;
2054320556
}

‎clang/lib/Headers/hlsl/hlsl_detail.h

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -79,6 +79,23 @@ constexpr enable_if_t<is_same<float, T>::value || is_same<half, T>::value, T>
7979
distance_vec_impl(vector<T, N> X, vector<T, N> Y) {
8080
return length_vec_impl(X - Y);
8181
}
82+
83+
template <typename T>
84+
constexpr enable_if_t<is_same<float, T>::value || is_same<half, T>::value, T>
85+
reflect_impl(T I, T N) {
86+
return I - 2 * N * I * N;
87+
}
88+
89+
template <typename T, int L>
90+
constexpr enable_if_t<is_same<float, T>::value || is_same<half, T>::value, T>
91+
reflect_vec_impl(vector<T, L> I, vector<T, L> N) {
92+
#if (__has_builtin(__builtin_spirv_reflect))
93+
return __builtin_spirv_reflect(I, N);
94+
#else
95+
return I - 2 * N * __builtin_hlsl_dot(I, N);
96+
#endif
97+
}
98+
8299
} // namespace __detail
83100
} // namespace hlsl
84101
#endif //_HLSL_HLSL_DETAILS_H_

‎clang/lib/Headers/hlsl/hlsl_intrinsics.h

Lines changed: 43 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2008,6 +2008,49 @@ double3 rcp(double3);
20082008
_HLSL_BUILTIN_ALIAS(__builtin_hlsl_elementwise_rcp)
20092009
double4 rcp(double4);
20102010

2011+
//===----------------------------------------------------------------------===//
2012+
// reflect builtin
2013+
//===----------------------------------------------------------------------===//
2014+
2015+
/// \fn T reflect(T I, T N)
2016+
/// \brief Returns a reflection using an incident ray, \a I, and a surface
2017+
/// normal, \a N.
2018+
/// \param I The incident ray.
2019+
/// \param N The surface normal.
2020+
///
2021+
/// The return value is a floating-point vector that represents the reflection
2022+
/// of the incident ray, \a I, off a surface with the normal \a N.
2023+
///
2024+
/// This function calculates the reflection vector using the following formula:
2025+
/// V = I - 2 * N * dot(I N) .
2026+
///
2027+
/// N must already be normalized in order to achieve the desired result.
2028+
///
2029+
/// The operands must all be a scalar or vector whose component type is
2030+
/// floating-point.
2031+
///
2032+
/// Result type and the type of all operands must be the same type.
2033+
2034+
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
2035+
const inline half reflect(half I, half N) {
2036+
return __detail::reflect_impl(I, N);
2037+
}
2038+
2039+
const inline float reflect(float I, float N) {
2040+
return __detail::reflect_impl(I, N);
2041+
}
2042+
2043+
template <int L>
2044+
_HLSL_16BIT_AVAILABILITY(shadermodel, 6.2)
2045+
const inline half reflect(vector<half, L> I, vector<half, L> N) {
2046+
return __detail::reflect_vec_impl(I, N);
2047+
}
2048+
2049+
template <int L>
2050+
const inline float reflect(vector<float, L> I, vector<float, L> N) {
2051+
return __detail::reflect_vec_impl(I, N);
2052+
}
2053+
20112054
//===----------------------------------------------------------------------===//
20122055
// rsqrt builtins
20132056
//===----------------------------------------------------------------------===//

‎clang/lib/Sema/SemaSPIRV.cpp

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -69,6 +69,38 @@ bool SemaSPIRV::CheckSPIRVBuiltinFunctionCall(unsigned BuiltinID,
6969
TheCall->setType(RetTy);
7070
break;
7171
}
72+
case SPIRV::BI__builtin_spirv_reflect: {
73+
if (SemaRef.checkArgCount(TheCall, 2))
74+
return true;
75+
76+
ExprResult A = TheCall->getArg(0);
77+
QualType ArgTyA = A.get()->getType();
78+
auto *VTyA = ArgTyA->getAs<VectorType>();
79+
if (VTyA == nullptr) {
80+
SemaRef.Diag(A.get()->getBeginLoc(),
81+
diag::err_typecheck_convert_incompatible)
82+
<< ArgTyA
83+
<< SemaRef.Context.getVectorType(ArgTyA, 2, VectorKind::Generic) << 1
84+
<< 0 << 0;
85+
return true;
86+
}
87+
88+
ExprResult B = TheCall->getArg(1);
89+
QualType ArgTyB = B.get()->getType();
90+
auto *VTyB = ArgTyB->getAs<VectorType>();
91+
if (VTyB == nullptr) {
92+
SemaRef.Diag(A.get()->getBeginLoc(),
93+
diag::err_typecheck_convert_incompatible)
94+
<< ArgTyB
95+
<< SemaRef.Context.getVectorType(ArgTyB, 2, VectorKind::Generic) << 1
96+
<< 0 << 0;
97+
return true;
98+
}
99+
100+
QualType RetTy = ArgTyA;
101+
TheCall->setType(RetTy);
102+
break;
103+
}
72104
}
73105
return false;
74106
}

‎clang/test/CodeGenHLSL/builtins/reflect.hlsl

Lines changed: 195 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,195 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
2+
// RUN: %clang_cc1 -finclude-default-header -triple \
3+
// RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
4+
// RUN: -emit-llvm -O1 -o - | FileCheck %s
5+
// RUN: %clang_cc1 -finclude-default-header -triple \
6+
// RUN: spirv-unknown-vulkan-compute %s -fnative-half-type \
7+
// RUN: -emit-llvm -O1 -o - | FileCheck %s --check-prefix=SPVCHECK
8+
9+
// CHECK-LABEL: define noundef nofpclass(nan inf) half @_Z17test_reflect_halfDhDh(
10+
// CHECK-SAME: half noundef nofpclass(nan inf) [[I:%.*]], half noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
11+
// CHECK-NEXT: [[ENTRY:.*:]]
12+
// CHECK-NEXT: [[MUL_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[I]], 0xH4000
13+
// CHECK-NEXT: [[TMP0:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[N]], [[N]]
14+
// CHECK-NEXT: [[MUL2_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[TMP0]], [[MUL_I]]
15+
// CHECK-NEXT: [[SUB_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn half [[I]], [[MUL2_I]]
16+
// CHECK-NEXT: ret half [[SUB_I]]
17+
//
18+
// SPVCHECK-LABEL: define spir_func noundef nofpclass(nan inf) half @_Z17test_reflect_halfDhDh(
19+
// SPVCHECK-SAME: half noundef nofpclass(nan inf) [[I:%.*]], half noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
20+
// SPVCHECK-NEXT: [[ENTRY:.*:]]
21+
// SPVCHECK-NEXT: [[MUL_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[I]], 0xH4000
22+
// SPVCHECK-NEXT: [[TMP0:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[N]], [[N]]
23+
// SPVCHECK-NEXT: [[MUL2_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[TMP0]], [[MUL_I]]
24+
// SPVCHECK-NEXT: [[SUB_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn half [[I]], [[MUL2_I]]
25+
// SPVCHECK-NEXT: ret half [[SUB_I]]
26+
//
27+
half test_reflect_half(half I, half N) {
28+
return reflect(I, N);
29+
}
30+
31+
// CHECK-LABEL: define noundef nofpclass(nan inf) <2 x half> @_Z18test_reflect_half2Dv2_DhS_(
32+
// CHECK-SAME: <2 x half> noundef nofpclass(nan inf) [[I:%.*]], <2 x half> noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
33+
// CHECK-NEXT: [[ENTRY:.*:]]
34+
// CHECK-NEXT: [[HLSL_DOT_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn half @llvm.dx.fdot.v2f16(<2 x half> [[I]], <2 x half> [[N]])
35+
// CHECK-NEXT: [[TMP0:%.*]] = extractelement <2 x half> [[I]], i64 0
36+
// CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x half> [[N]], i64 0
37+
// CHECK-NEXT: [[TMP2:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[TMP1]], 0xH4000
38+
// CHECK-NEXT: [[TMP3:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[TMP2]], [[HLSL_DOT_I]]
39+
// CHECK-NEXT: [[CAST_VTRUNC_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn half [[TMP0]], [[TMP3]]
40+
// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <2 x half> poison, half [[CAST_VTRUNC_I]], i64 0
41+
// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <2 x half> [[SPLAT_SPLATINSERT]], <2 x half> poison, <2 x i32> zeroinitializer
42+
// CHECK-NEXT: ret <2 x half> [[SPLAT_SPLAT]]
43+
//
44+
// SPVCHECK-LABEL: define spir_func noundef nofpclass(nan inf) <2 x half> @_Z18test_reflect_half2Dv2_DhS_(
45+
// SPVCHECK-SAME: <2 x half> noundef nofpclass(nan inf) [[I:%.*]], <2 x half> noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
46+
// SPVCHECK-NEXT: [[ENTRY:.*:]]
47+
// SPVCHECK-NEXT: [[SPV_REFLECT_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn <2 x half> @llvm.spv.reflect.v2f16(<2 x half> [[I]], <2 x half> [[N]])
48+
// SPVCHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <2 x half> [[SPV_REFLECT_I]], <2 x half> poison, <2 x i32> zeroinitializer
49+
// SPVCHECK-NEXT: ret <2 x half> [[SPLAT_SPLAT]]
50+
//
51+
half2 test_reflect_half2(half2 I, half2 N) {
52+
return reflect(I, N);
53+
}
54+
55+
// CHECK-LABEL: define noundef nofpclass(nan inf) <3 x half> @_Z18test_reflect_half3Dv3_DhS_(
56+
// CHECK-SAME: <3 x half> noundef nofpclass(nan inf) [[I:%.*]], <3 x half> noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
57+
// CHECK-NEXT: [[ENTRY:.*:]]
58+
// CHECK-NEXT: [[HLSL_DOT_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn half @llvm.dx.fdot.v3f16(<3 x half> [[I]], <3 x half> [[N]])
59+
// CHECK-NEXT: [[TMP0:%.*]] = extractelement <3 x half> [[I]], i64 0
60+
// CHECK-NEXT: [[TMP1:%.*]] = extractelement <3 x half> [[N]], i64 0
61+
// CHECK-NEXT: [[TMP2:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[TMP1]], 0xH4000
62+
// CHECK-NEXT: [[TMP3:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[TMP2]], [[HLSL_DOT_I]]
63+
// CHECK-NEXT: [[CAST_VTRUNC_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn half [[TMP0]], [[TMP3]]
64+
// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <3 x half> poison, half [[CAST_VTRUNC_I]], i64 0
65+
// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <3 x half> [[SPLAT_SPLATINSERT]], <3 x half> poison, <3 x i32> zeroinitializer
66+
// CHECK-NEXT: ret <3 x half> [[SPLAT_SPLAT]]
67+
//
68+
// SPVCHECK-LABEL: define spir_func noundef nofpclass(nan inf) <3 x half> @_Z18test_reflect_half3Dv3_DhS_(
69+
// SPVCHECK-SAME: <3 x half> noundef nofpclass(nan inf) [[I:%.*]], <3 x half> noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
70+
// SPVCHECK-NEXT: [[ENTRY:.*:]]
71+
// SPVCHECK-NEXT: [[SPV_REFLECT_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn <3 x half> @llvm.spv.reflect.v3f16(<3 x half> [[I]], <3 x half> [[N]])
72+
// SPVCHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <3 x half> [[SPV_REFLECT_I]], <3 x half> poison, <3 x i32> zeroinitializer
73+
// SPVCHECK-NEXT: ret <3 x half> [[SPLAT_SPLAT]]
74+
//
75+
half3 test_reflect_half3(half3 I, half3 N) {
76+
return reflect(I, N);
77+
}
78+
79+
// CHECK-LABEL: define noundef nofpclass(nan inf) <4 x half> @_Z18test_reflect_half4Dv4_DhS_(
80+
// CHECK-SAME: <4 x half> noundef nofpclass(nan inf) [[I:%.*]], <4 x half> noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
81+
// CHECK-NEXT: [[ENTRY:.*:]]
82+
// CHECK-NEXT: [[HLSL_DOT_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn half @llvm.dx.fdot.v4f16(<4 x half> [[I]], <4 x half> [[N]])
83+
// CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x half> [[I]], i64 0
84+
// CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x half> [[N]], i64 0
85+
// CHECK-NEXT: [[TMP2:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[TMP1]], 0xH4000
86+
// CHECK-NEXT: [[TMP3:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[TMP2]], [[HLSL_DOT_I]]
87+
// CHECK-NEXT: [[CAST_VTRUNC_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn half [[TMP0]], [[TMP3]]
88+
// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <4 x half> poison, half [[CAST_VTRUNC_I]], i64 0
89+
// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x half> [[SPLAT_SPLATINSERT]], <4 x half> poison, <4 x i32> zeroinitializer
90+
// CHECK-NEXT: ret <4 x half> [[SPLAT_SPLAT]]
91+
//
92+
// SPVCHECK-LABEL: define spir_func noundef nofpclass(nan inf) <4 x half> @_Z18test_reflect_half4Dv4_DhS_(
93+
// SPVCHECK-SAME: <4 x half> noundef nofpclass(nan inf) [[I:%.*]], <4 x half> noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
94+
// SPVCHECK-NEXT: [[ENTRY:.*:]]
95+
// SPVCHECK-NEXT: [[SPV_REFLECT_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn <4 x half> @llvm.spv.reflect.v4f16(<4 x half> [[I]], <4 x half> [[N]])
96+
// SPVCHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x half> [[SPV_REFLECT_I]], <4 x half> poison, <4 x i32> zeroinitializer
97+
// SPVCHECK-NEXT: ret <4 x half> [[SPLAT_SPLAT]]
98+
//
99+
half4 test_reflect_half4(half4 I, half4 N) {
100+
return reflect(I, N);
101+
}
102+
103+
// CHECK-LABEL: define noundef nofpclass(nan inf) float @_Z18test_reflect_floatff(
104+
// CHECK-SAME: float noundef nofpclass(nan inf) [[I:%.*]], float noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
105+
// CHECK-NEXT: [[ENTRY:.*:]]
106+
// CHECK-NEXT: [[MUL_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn float [[I]], 2.000000e+00
107+
// CHECK-NEXT: [[TMP0:%.*]] = fmul reassoc nnan ninf nsz arcp afn float [[N]], [[N]]
108+
// CHECK-NEXT: [[MUL2_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn float [[TMP0]], [[MUL_I]]
109+
// CHECK-NEXT: [[SUB_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn float [[I]], [[MUL2_I]]
110+
// CHECK-NEXT: ret float [[SUB_I]]
111+
//
112+
// SPVCHECK-LABEL: define spir_func noundef nofpclass(nan inf) float @_Z18test_reflect_floatff(
113+
// SPVCHECK-SAME: float noundef nofpclass(nan inf) [[I:%.*]], float noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
114+
// SPVCHECK-NEXT: [[ENTRY:.*:]]
115+
// SPVCHECK-NEXT: [[MUL_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn float [[I]], 2.000000e+00
116+
// SPVCHECK-NEXT: [[TMP0:%.*]] = fmul reassoc nnan ninf nsz arcp afn float [[N]], [[N]]
117+
// SPVCHECK-NEXT: [[MUL2_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn float [[TMP0]], [[MUL_I]]
118+
// SPVCHECK-NEXT: [[SUB_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn float [[I]], [[MUL2_I]]
119+
// SPVCHECK-NEXT: ret float [[SUB_I]]
120+
//
121+
float test_reflect_float(float I, float N) {
122+
return reflect(I, N);
123+
}
124+
125+
// CHECK-LABEL: define noundef nofpclass(nan inf) <2 x float> @_Z19test_reflect_float2Dv2_fS_(
126+
// CHECK-SAME: <2 x float> noundef nofpclass(nan inf) [[I:%.*]], <2 x float> noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
127+
// CHECK-NEXT: [[ENTRY:.*:]]
128+
// CHECK-NEXT: [[HLSL_DOT_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn float @llvm.dx.fdot.v2f32(<2 x float> [[I]], <2 x float> [[N]])
129+
// CHECK-NEXT: [[TMP0:%.*]] = extractelement <2 x float> [[I]], i64 0
130+
// CHECK-NEXT: [[TMP1:%.*]] = extractelement <2 x float> [[N]], i64 0
131+
// CHECK-NEXT: [[TMP2:%.*]] = fmul reassoc nnan ninf nsz arcp afn float [[TMP1]], 2.000000e+00
132+
// CHECK-NEXT: [[TMP3:%.*]] = fmul reassoc nnan ninf nsz arcp afn float [[TMP2]], [[HLSL_DOT_I]]
133+
// CHECK-NEXT: [[CAST_VTRUNC_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn float [[TMP0]], [[TMP3]]
134+
// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <2 x float> poison, float [[CAST_VTRUNC_I]], i64 0
135+
// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <2 x float> [[SPLAT_SPLATINSERT]], <2 x float> poison, <2 x i32> zeroinitializer
136+
// CHECK-NEXT: ret <2 x float> [[SPLAT_SPLAT]]
137+
//
138+
// SPVCHECK-LABEL: define spir_func noundef nofpclass(nan inf) <2 x float> @_Z19test_reflect_float2Dv2_fS_(
139+
// SPVCHECK-SAME: <2 x float> noundef nofpclass(nan inf) [[I:%.*]], <2 x float> noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
140+
// SPVCHECK-NEXT: [[ENTRY:.*:]]
141+
// SPVCHECK-NEXT: [[SPV_REFLECT_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn <2 x float> @llvm.spv.reflect.v2f32(<2 x float> [[I]], <2 x float> [[N]])
142+
// SPVCHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <2 x float> [[SPV_REFLECT_I]], <2 x float> poison, <2 x i32> zeroinitializer
143+
// SPVCHECK-NEXT: ret <2 x float> [[SPLAT_SPLAT]]
144+
//
145+
float2 test_reflect_float2(float2 I, float2 N) {
146+
return reflect(I, N);
147+
}
148+
149+
// CHECK-LABEL: define noundef nofpclass(nan inf) <3 x float> @_Z19test_reflect_float3Dv3_fS_(
150+
// CHECK-SAME: <3 x float> noundef nofpclass(nan inf) [[I:%.*]], <3 x float> noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
151+
// CHECK-NEXT: [[ENTRY:.*:]]
152+
// CHECK-NEXT: [[HLSL_DOT_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn float @llvm.dx.fdot.v3f32(<3 x float> [[I]], <3 x float> [[N]])
153+
// CHECK-NEXT: [[TMP0:%.*]] = extractelement <3 x float> [[I]], i64 0
154+
// CHECK-NEXT: [[TMP1:%.*]] = extractelement <3 x float> [[N]], i64 0
155+
// CHECK-NEXT: [[TMP2:%.*]] = fmul reassoc nnan ninf nsz arcp afn float [[TMP1]], 2.000000e+00
156+
// CHECK-NEXT: [[TMP3:%.*]] = fmul reassoc nnan ninf nsz arcp afn float [[TMP2]], [[HLSL_DOT_I]]
157+
// CHECK-NEXT: [[CAST_VTRUNC_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn float [[TMP0]], [[TMP3]]
158+
// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <3 x float> poison, float [[CAST_VTRUNC_I]], i64 0
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// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <3 x float> [[SPLAT_SPLATINSERT]], <3 x float> poison, <3 x i32> zeroinitializer
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// CHECK-NEXT: ret <3 x float> [[SPLAT_SPLAT]]
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//
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// SPVCHECK-LABEL: define spir_func noundef nofpclass(nan inf) <3 x float> @_Z19test_reflect_float3Dv3_fS_(
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// SPVCHECK-SAME: <3 x float> noundef nofpclass(nan inf) [[I:%.*]], <3 x float> noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// SPVCHECK-NEXT: [[ENTRY:.*:]]
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// SPVCHECK-NEXT: [[SPV_REFLECT_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn <3 x float> @llvm.spv.reflect.v3f32(<3 x float> [[I]], <3 x float> [[N]])
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// SPVCHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <3 x float> [[SPV_REFLECT_I]], <3 x float> poison, <3 x i32> zeroinitializer
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// SPVCHECK-NEXT: ret <3 x float> [[SPLAT_SPLAT]]
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//
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float3 test_reflect_float3(float3 I, float3 N) {
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return reflect(I, N);
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}
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// CHECK-LABEL: define noundef nofpclass(nan inf) <4 x float> @_Z19test_reflect_float4Dv4_fS_(
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// CHECK-SAME: <4 x float> noundef nofpclass(nan inf) [[I:%.*]], <4 x float> noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// CHECK-NEXT: [[ENTRY:.*:]]
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// CHECK-NEXT: [[HLSL_DOT_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn float @llvm.dx.fdot.v4f32(<4 x float> [[I]], <4 x float> [[N]])
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// CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x float> [[I]], i64 0
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// CHECK-NEXT: [[TMP1:%.*]] = extractelement <4 x float> [[N]], i64 0
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// CHECK-NEXT: [[TMP2:%.*]] = fmul reassoc nnan ninf nsz arcp afn float [[TMP1]], 2.000000e+00
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// CHECK-NEXT: [[TMP3:%.*]] = fmul reassoc nnan ninf nsz arcp afn float [[TMP2]], [[HLSL_DOT_I]]
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// CHECK-NEXT: [[CAST_VTRUNC_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn float [[TMP0]], [[TMP3]]
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// CHECK-NEXT: [[SPLAT_SPLATINSERT:%.*]] = insertelement <4 x float> poison, float [[CAST_VTRUNC_I]], i64 0
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// CHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x float> [[SPLAT_SPLATINSERT]], <4 x float> poison, <4 x i32> zeroinitializer
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// CHECK-NEXT: ret <4 x float> [[SPLAT_SPLAT]]
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//
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// SPVCHECK-LABEL: define spir_func noundef nofpclass(nan inf) <4 x float> @_Z19test_reflect_float4Dv4_fS_(
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// SPVCHECK-SAME: <4 x float> noundef nofpclass(nan inf) [[I:%.*]], <4 x float> noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0]] {
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// SPVCHECK-NEXT: [[ENTRY:.*:]]
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// SPVCHECK-NEXT: [[SPV_REFLECT_I:%.*]] = tail call reassoc nnan ninf nsz arcp afn <4 x float> @llvm.spv.reflect.v4f32(<4 x float> [[I]], <4 x float> [[N]])
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// SPVCHECK-NEXT: [[SPLAT_SPLAT:%.*]] = shufflevector <4 x float> [[SPV_REFLECT_I]], <4 x float> poison, <4 x i32> zeroinitializer
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// SPVCHECK-NEXT: ret <4 x float> [[SPLAT_SPLAT]]
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//
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float4 test_reflect_float4(float4 I, float4 N) {
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return reflect(I, N);
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}

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