@@ -603,8 +603,10 @@ bool LowOverheadLoop::ValidateTailPredicate() {
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return false ;
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}
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- if (!VPTState::isValid (RDA))
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+ if (!VPTState::isValid (RDA)) {
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+ LLVM_DEBUG (dbgs () << " ARM Loops: Invalid VPT state.\n " );
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return false ;
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+ }
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if (!ValidateLiveOuts ()) {
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LLVM_DEBUG (dbgs () << " ARM Loops: Invalid live outs.\n " );
@@ -655,9 +657,13 @@ bool LowOverheadLoop::ValidateTailPredicate() {
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// instructions in the preheader.
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auto CannotInsertWDLSTPBetween = [](MachineBasicBlock::iterator I,
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MachineBasicBlock::iterator E) {
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- for (; I != E; ++I)
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- if (shouldInspect (*I))
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+ for (; I != E; ++I) {
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+ if (shouldInspect (*I)) {
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+ LLVM_DEBUG (dbgs () << " ARM Loops: Instruction blocks [W|D]LSTP"
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+ << " insertion: " << *I);
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return true ;
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+ }
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+ }
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return false ;
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};
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@@ -719,11 +725,17 @@ bool LowOverheadLoop::ValidateTailPredicate() {
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continue ;
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if (isSubImmOpcode (MI->getOpcode ())) {
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- if (FoundSub || !IsValidSub (MI, ExpectedVectorWidth))
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+ if (FoundSub || !IsValidSub (MI, ExpectedVectorWidth)) {
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+ LLVM_DEBUG (dbgs () << " ARM Loops: Unexpected instruction in element"
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+ " count: " << *MI);
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return false ;
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+ }
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FoundSub = true ;
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- } else
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+ } else {
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+ LLVM_DEBUG (dbgs () << " ARM Loops: Unexpected instruction in element"
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+ " count: " << *MI);
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return false ;
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+ }
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}
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ToRemove.insert (ElementChain.begin (), ElementChain.end ());
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}
@@ -1082,8 +1094,14 @@ void LowOverheadLoop::Validate(ARMBasicBlockUtils *BBUtils) {
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Revert = true ;
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return ;
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}
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-
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TryAdjustInsertionPoint (StartInsertPt, Start, RDA);
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+ LLVM_DEBUG (if (StartInsertPt == StartInsertBB->end ())
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+ dbgs () << " ARM Loops: Will insert LoopStart at end of block\n " ;
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+ else
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+ dbgs () << " ARM Loops: Will insert LoopStart at "
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+ << *StartInsertPt
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+ );
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+
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Revert = !ValidateRanges (Start, End, BBUtils, ML);
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CannotTailPredicate = !ValidateTailPredicate ();
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}
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