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[VectorCombine] Do not try to operate on OperandBundles.
This bails out if we see an intrinsic with an operand bundle on it, to make sure we don't process the bundles incorrectly. Fixes #110382.
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llvm/lib/Transforms/Vectorize/VectorCombine.cpp

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@@ -2039,6 +2039,8 @@ bool VectorCombine::foldShuffleToIdentity(Instruction &I) {
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continue;
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} else if (auto *II = dyn_cast<IntrinsicInst>(FrontU);
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II && isTriviallyVectorizable(II->getIntrinsicID())) {
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if (II->hasOperandBundles())
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return false;
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for (unsigned Op = 0, E = II->getNumOperands() - 1; Op < E; Op++) {
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if (isVectorIntrinsicWithScalarOpAtArg(II->getIntrinsicID(), Op)) {
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if (!all_of(drop_begin(Item), [Item, Op](InstLane &IL) {

llvm/test/Transforms/VectorCombine/AArch64/shuffletoidentity.ll

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@@ -1066,4 +1066,18 @@ entry:
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ret <2 x float> %4
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}
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define <16 x i64> @operandbundles(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c) {
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; CHECK-LABEL: @operandbundles(
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; CHECK-NEXT: [[CALL:%.*]] = call <4 x i64> @llvm.fshl.v4i64(<4 x i64> [[A:%.*]], <4 x i64> [[B:%.*]], <4 x i64> [[C:%.*]]) [ "jl_roots"(ptr addrspace(10) null, ptr addrspace(10) null) ]
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; CHECK-NEXT: [[SHUFFLEVECTOR:%.*]] = shufflevector <4 x i64> [[CALL]], <4 x i64> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
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; CHECK-NEXT: [[SHUFFLEVECTOR1:%.*]] = shufflevector <16 x i64> [[SHUFFLEVECTOR]], <16 x i64> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
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; CHECK-NEXT: ret <16 x i64> [[SHUFFLEVECTOR1]]
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;
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%call = call <4 x i64> @llvm.fshl.v4i64(<4 x i64> %a, <4 x i64> %b, <4 x i64> %c) [ "jl_roots"(ptr addrspace(10) null, ptr addrspace(10) null) ]
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%shufflevector = shufflevector <4 x i64> %call, <4 x i64> poison, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison, i32 poison>
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%shufflevector1 = shufflevector <16 x i64> %shufflevector, <16 x i64> undef, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
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ret <16 x i64> %shufflevector1
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}
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declare <4 x i64> @llvm.fshl.v4i64(<4 x i64>, <4 x i64>, <4 x i64>)
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declare void @use(<4 x i8>)

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