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[Clang] Partially fix m68k alignments (#144740)
As the data layout a few lines further up specifies, the int, long and pointer alignment should be 16 instead of the default of 32. The long long alignment is also incorrect, but that would require a change to the data layout as well. Comparison with GCC, which consistently uses 2 byte alignment: https://gcc.godbolt.org/z/K3x6a7dEf At least based on some spot checks, the changes to bit field layout also make use match GCC now. This was found by #144720.
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‎clang/lib/Basic/Targets/M68k.cpp

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -56,6 +56,7 @@ M68kTargetInfo::M68kTargetInfo(const llvm::Triple &Triple,
5656
SizeType = UnsignedInt;
5757
PtrDiffType = SignedInt;
5858
IntPtrType = SignedInt;
59+
IntAlign = LongAlign = PointerAlign = 16;
5960
}
6061

6162
bool M68kTargetInfo::setCPU(const std::string &Name) {

‎clang/test/CodeGen/bitfield-access-pad.c

Lines changed: 51 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,7 +18,7 @@
1818
// RUN: %clang_cc1 -triple=hexagon-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s
1919

2020
// Big endian
21-
// RUN: %clang_cc1 -triple=m68k-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s
21+
// RUN: %clang_cc1 -triple=m68k-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-M68K %s
2222
// RUN: %clang_cc1 -triple=mips-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-T %s
2323

2424
// And now a few with -fno-bitfield-type-align. Precisely how this behaves is
@@ -45,6 +45,7 @@ struct P1 {
4545
// CHECK-LABEL: LLVMType:%struct.P1 =
4646
// LAYOUT-T-SAME: type { i8, i8, [2 x i8] }
4747
// LAYOUT-ARM64-T-SAME: type { i8, i8 }
48+
// LAYOUT-M68K-SAME: type { i8, i8 }
4849
// LAYOUT-NT-SAME: type { i8, i8 }
4950
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
5051
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
@@ -60,6 +61,9 @@ struct P1 {
6061

6162
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
6263
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
64+
//
65+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
66+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:1
6367

6468
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
6569
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
@@ -75,6 +79,7 @@ struct P2 {
7579
// CHECK-LABEL: LLVMType:%struct.P2 =
7680
// LAYOUT-T-SAME: type { i8, i8, i8, i8 }
7781
// LAYOUT-ARM64-T-SAME: type { i8, i8, i8, i8 }
82+
// LAYOUT-M68K-SAME: type { i8, i8, i8, i8 }
7883
// LAYOUT-NT-SAME: type { i8, i8 }
7984
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
8085
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
@@ -90,6 +95,9 @@ struct P2 {
9095

9196
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
9297
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
98+
//
99+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
100+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
93101

94102
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
95103
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
@@ -105,6 +113,7 @@ struct P3 {
105113
// CHECK-LABEL: LLVMType:%struct.P3 =
106114
// LAYOUT-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
107115
// LAYOUT-ARM64-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
116+
// LAYOUT-M68K-SAME: type { i8, i8, i8, i8 }
108117
// LAYOUT-NT-SAME: type { i8, i8 }
109118
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
110119
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
@@ -120,6 +129,9 @@ struct P3 {
120129

121130
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
122131
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
132+
//
133+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
134+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
123135

124136
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
125137
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
@@ -134,6 +146,7 @@ struct P4 {
134146
// CHECK-LABEL: LLVMType:%struct.P4 =
135147
// LAYOUT-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
136148
// LAYOUT-ARM64-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
149+
// LAYOUT-M68K-SAME: type { i8, i8, i8, i8 }
137150
// LAYOUT-NT-SAME: type { i8, i8 }
138151
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
139152
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
@@ -149,6 +162,9 @@ struct P4 {
149162

150163
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
151164
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
165+
//
166+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
167+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
152168

153169
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
154170
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
@@ -162,6 +178,7 @@ struct P5 {
162178
// CHECK-LABEL: LLVMType:%struct.P5 =
163179
// LAYOUT-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
164180
// LAYOUT-ARM64-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
181+
// LAYOUT-M68K-SAME: type { i8, i8, i8, i8 }
165182
// LAYOUT-NT-SAME: type { i8, i8 }
166183
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
167184
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
@@ -177,6 +194,9 @@ struct P5 {
177194

178195
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
179196
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
197+
//
198+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
199+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
180200

181201
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
182202
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
@@ -192,6 +212,7 @@ struct P6 {
192212
// CHECK-LABEL: LLVMType:%struct.P6 =
193213
// LAYOUT-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
194214
// LAYOUT-ARM64-T-SAME: type { i8, [3 x i8], i8, [3 x i8] }
215+
// LAYOUT-M68K-SAME: type { i8, i8, i8, i8 }
195216
// LAYOUT-NT-SAME: type { i8, i8 }
196217
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
197218
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
@@ -207,6 +228,9 @@ struct P6 {
207228

208229
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
209230
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
231+
//
232+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
233+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
210234

211235
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
212236
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
@@ -220,6 +244,7 @@ struct P7 {
220244
// CHECK-LABEL: LLVMType:%struct.P7 =
221245
// LAYOUT-T-SAME: type { i8, i8, i8, i8 }
222246
// LAYOUT-ARM64-T-SAME: type { i8, i8, i8, i8 }
247+
// LAYOUT-M68K-SAME: type { i8, i8, i8, i8 }
223248
// LAYOUT-NT-SAME: type { i8, i8 }
224249
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
225250
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
@@ -235,6 +260,9 @@ struct P7 {
235260

236261
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
237262
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
263+
//
264+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
265+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
238266

239267
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
240268
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
@@ -250,6 +278,7 @@ struct __attribute__ ((aligned (2))) P7_align {
250278
// CHECK-LABEL: LLVMType:%struct.P7_align =
251279
// LAYOUT-T-SAME: type { i8, i8, i8, i8 }
252280
// LAYOUT-ARM64-T-SAME: type { i8, i8, i8, i8 }
281+
// LAYOUT-M68K-SAME: type { i8, i8, i8, i8 }
253282
// LAYOUT-NT-SAME: type { i8, i8 }
254283
// LAYOUT-STRICT-NT-SAME: type { i8, i8 }
255284
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
@@ -265,6 +294,9 @@ struct __attribute__ ((aligned (2))) P7_align {
265294

266295
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
267296
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
297+
//
298+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
299+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:2
268300

269301
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:0
270302
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:8 StorageOffset:4
@@ -278,6 +310,7 @@ struct P8 {
278310
// CHECK-LABEL: LLVMType:%struct.P8 =
279311
// LAYOUT-T-SAME: type { i8, i8, i8, i8 }
280312
// LAYOUT-ARM64-T-SAME: type { i8, i8, i8, i8 }
313+
// LAYOUT-M68K-SAME: type { i8, i8, i8, i8 }
281314
// LAYOUT-NT-SAME: type { i16 }
282315
// LAYOUT-STRICT-NT-SAME: type { i16 }
283316
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
@@ -293,6 +326,9 @@ struct P8 {
293326

294327
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:8 StorageOffset:0
295328
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:8 StorageOffset:2
329+
//
330+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:8 StorageOffset:0
331+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:8 StorageOffset:2
296332

297333
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:8 StorageOffset:0
298334
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:8 StorageOffset:4
@@ -306,6 +342,7 @@ struct P9 {
306342
// CHECK-LABEL: LLVMType:%struct.P9 =
307343
// LAYOUT-T-SAME: type { i8, i8, [2 x i8] }
308344
// LAYOUT-ARM64-T-SAME: type { i8, i8 }
345+
// LAYOUT-M68K-SAME: type { i8, i8 }
309346
// LAYOUT-NT-SAME: type { i16 }
310347
// LAYOUT-STRICT-NT-SAME: type { i16 }
311348
// LAYOUT-DWN32-SAME: type { i8, [3 x i8], i8, [3 x i8] }
@@ -321,6 +358,9 @@ struct P9 {
321358

322359
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:8 StorageOffset:0
323360
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:8 StorageOffset:1
361+
//
362+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:8 StorageOffset:0
363+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:8 StorageOffset:1
324364

325365
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:8 StorageOffset:0
326366
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:8 StorageOffset:4
@@ -335,6 +375,7 @@ struct __attribute__((aligned(4))) P10 {
335375
// CHECK-LABEL: LLVMType:%struct.P10 =
336376
// LAYOUT-T-SAME: type { i32 }
337377
// LAYOUT-ARM64-T-SAME: type { i32 }
378+
// LAYOUT-M68K-SAME: type { i32 }
338379
// LAYOUT-NT-SAME: type { i32 }
339380
// LAYOUT-STRICT-NT-SAME: type { i32 }
340381
// LAYOUT-DWN32-SAME: type { i32 }
@@ -354,6 +395,10 @@ struct __attribute__((aligned(4))) P10 {
354395
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
355396
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
356397
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
398+
//
399+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
400+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
401+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
357402

358403
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
359404
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
@@ -369,6 +414,7 @@ struct __attribute__((aligned(4))) P11 {
369414
// CHECK-LABEL: LLVMType:%struct.P11 =
370415
// LAYOUT-T-SAME: type { i32 }
371416
// LAYOUT-ARM64-T-SAME: type { i32 }
417+
// LAYOUT-M68K-SAME: type { i32 }
372418
// LAYOUT-NT-SAME: type { i32 }
373419
// LAYOUT-STRICT-NT-SAME: type { i32 }
374420
// LAYOUT-DWN32-SAME: type { i32 }
@@ -388,6 +434,10 @@ struct __attribute__((aligned(4))) P11 {
388434
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
389435
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
390436
// LAYOUT-ARM64-T-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:10 IsSigned:0 StorageSize:32 StorageOffset:0
437+
//
438+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
439+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
440+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:10 IsSigned:0 StorageSize:32 StorageOffset:0
391441

392442
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0
393443
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:7 IsSigned:0 StorageSize:32 StorageOffset:0

‎clang/test/CodeGenCXX/bitfield-access-empty.cpp

Lines changed: 21 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,7 +35,7 @@
3535

3636
// Big endian
3737
// RUN: %clang_cc1 -triple=lanai-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
38-
// RUN: %clang_cc1 -triple=m68k-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
38+
// RUN: %clang_cc1 -triple=m68k-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT-M68K %s
3939
// RUN: %clang_cc1 -triple=mips-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
4040
// RUN: %clang_cc1 -triple=mips64-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
4141
// RUN: %clang_cc1 -triple=sparc-elf %s -emit-llvm -o /dev/null -fdump-record-layouts-simple | FileCheck --check-prefixes CHECK,LAYOUT %s
@@ -51,13 +51,17 @@ struct P1 {
5151
// CHECK-LABEL: LLVMType:%struct.P1 =
5252
// LAYOUT-SAME: type { i16, i16 }
5353
// LAYOUT-DWN32-SAME: type { i16, i16 }
54+
// LAYOUT-DWN32-M68K: type { i16, i16 }
5455
// CHECK-NEXT: NonVirtualBaseLLVMType:%struct.P1 =
5556
// CHECK: BitFields:[
5657
// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:0
5758
// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:2
5859

5960
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:0
6061
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:2
62+
63+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:0
64+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:2
6165
// CHECK-NEXT: ]>
6266

6367
struct P2 {
@@ -68,13 +72,17 @@ struct P2 {
6872
// CHECK-LABEL: LLVMType:%struct.P2 =
6973
// LAYOUT-SAME: type { i16, i16 }
7074
// LAYOUT-DWN32-SAME: type { i16, i16 }
75+
// LAYOUT-M68K-SAME: type { i16, i16 }
7176
// CHECK-NEXT: NonVirtualBaseLLVMType:%struct.P2 =
7277
// CHECK: BitFields:[
7378
// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:15 IsSigned:0 StorageSize:16 StorageOffset:0
7479
// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:15 IsSigned:0 StorageSize:16 StorageOffset:2
7580

7681
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:15 IsSigned:0 StorageSize:16 StorageOffset:0
7782
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:15 IsSigned:0 StorageSize:16 StorageOffset:2
83+
84+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:15 IsSigned:0 StorageSize:16 StorageOffset:0
85+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:15 IsSigned:0 StorageSize:16 StorageOffset:2
7886
// CHECK-NEXT: ]>
7987

8088
struct P3 {
@@ -85,13 +93,17 @@ struct P3 {
8593
// CHECK-LABEL: LLVMType:%struct.P3 =
8694
// LAYOUT-SAME: type { i16, [2 x i8], i16, [2 x i8] }
8795
// LAYOUT-DWN32-SAME: type <{ i16, i8, i16 }>
96+
// LAYOUT-M68K-SAME: type <{ i16, i8, i16, i8 }>
8897
// CHECK-NEXT: NonVirtualBaseLLVMType:%struct.P3 =
8998
// CHECK: BitFields:[
9099
// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:0
91100
// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:4
92101

93102
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:0
94103
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:3
104+
105+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:0
106+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:16 StorageOffset:3
95107
// CHECK-NEXT: ]>
96108

97109
struct P4 {
@@ -121,13 +133,17 @@ struct P6 {
121133
// CHECK-LABEL: LLVMType:%struct.P6 =
122134
// LAYOUT-SAME: type { i32, i32 }
123135
// LAYOUT-DWN32-SAME: type { i32, i32 }
136+
// LAYOUT-M68K-SAME: type { i32, i32 }
124137
// CHECK-NEXT: NonVirtualBaseLLVMType:%struct.P6 =
125138
// CHECK: BitFields:[
126139
// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:32 StorageOffset:0
127140
// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:32 StorageOffset:0
128141

129142
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:32 StorageOffset:0
130143
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:32 StorageOffset:0
144+
145+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:32 StorageOffset:0
146+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:32 StorageOffset:0
131147
// CHECK-NEXT: ]>
132148

133149
struct P7 {
@@ -139,11 +155,15 @@ struct P7 {
139155
// CHECK-LABEL: LLVMType:%struct.P7 =
140156
// LAYOUT-SAME: type { i32, i32 }
141157
// LAYOUT-DWN32-SAME: type { i32, i32 }
158+
// LAYOUT-M68K-SAME: type { i32, i32 }
142159
// CHECK-NEXT: NonVirtualBaseLLVMType:%struct.P7 =
143160
// CHECK: BitFields:[
144161
// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:32 StorageOffset:0
145162
// LAYOUT-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:32 StorageOffset:0
146163

147164
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:32 StorageOffset:0
148165
// LAYOUT-DWN32-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:32 StorageOffset:0
166+
167+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:16 IsSigned:0 StorageSize:32 StorageOffset:0
168+
// LAYOUT-M68K-NEXT: <CGBitFieldInfo Offset:{{[0-9]+}} Size:8 IsSigned:0 StorageSize:32 StorageOffset:0
149169
// CHECK-NEXT: ]>

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