@@ -285,7 +285,22 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
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{s32, p0, s16, 16 },
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{s32, p0, s32, 32 },
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{p0, p0, sXLen , XLen}});
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- if (ST.hasVInstructions ())
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+ auto &ExtLoadActions =
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+ getActionDefinitionsBuilder ({G_SEXTLOAD, G_ZEXTLOAD})
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+ .legalForTypesWithMemDesc ({{s32, p0, s8, 8 }, {s32, p0, s16, 16 }});
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+ if (XLen == 64 ) {
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+ LoadStoreActions.legalForTypesWithMemDesc ({{s64, p0, s8, 8 },
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+ {s64, p0, s16, 16 },
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+ {s64, p0, s32, 32 },
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+ {s64, p0, s64, 64 }});
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+ ExtLoadActions.legalForTypesWithMemDesc (
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+ {{s64, p0, s8, 8 }, {s64, p0, s16, 16 }, {s64, p0, s32, 32 }});
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+ } else if (ST.hasStdExtD ()) {
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+ LoadStoreActions.legalForTypesWithMemDesc ({{s64, p0, s64, 64 }});
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+ }
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+
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+ // Vector loads/stores.
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+ if (ST.hasVInstructions ()) {
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LoadStoreActions.legalForTypesWithMemDesc ({{nxv2s8, p0, nxv2s8, 8 },
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{nxv4s8, p0, nxv4s8, 8 },
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{nxv8s8, p0, nxv8s8, 8 },
@@ -302,38 +317,26 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
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{nxv8s32, p0, nxv8s32, 32 },
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{nxv16s32, p0, nxv16s32, 32 }});
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- auto &ExtLoadActions =
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- getActionDefinitionsBuilder ({G_SEXTLOAD, G_ZEXTLOAD})
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- .legalForTypesWithMemDesc ({{s32, p0, s8, 8 }, {s32, p0, s16, 16 }});
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- if (XLen == 64 ) {
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- LoadStoreActions.legalForTypesWithMemDesc ({{s64, p0, s8, 8 },
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- {s64, p0, s16, 16 },
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- {s64, p0, s32, 32 },
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- {s64, p0, s64, 64 }});
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- ExtLoadActions.legalForTypesWithMemDesc (
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- {{s64, p0, s8, 8 }, {s64, p0, s16, 16 }, {s64, p0, s32, 32 }});
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- } else if (ST.hasStdExtD ()) {
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- LoadStoreActions.legalForTypesWithMemDesc ({{s64, p0, s64, 64 }});
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- }
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- if (ST.hasVInstructions () && ST.getELen () == 64 )
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- LoadStoreActions.legalForTypesWithMemDesc ({{nxv1s8, p0, nxv1s8, 8 },
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- {nxv1s16, p0, nxv1s16, 16 },
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- {nxv1s32, p0, nxv1s32, 32 }});
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+ if (ST.getELen () == 64 )
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+ LoadStoreActions.legalForTypesWithMemDesc ({{nxv1s8, p0, nxv1s8, 8 },
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+ {nxv1s16, p0, nxv1s16, 16 },
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+ {nxv1s32, p0, nxv1s32, 32 }});
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- if (ST.hasVInstructionsI64 ())
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- LoadStoreActions.legalForTypesWithMemDesc ({{nxv1s64, p0, nxv1s64, 64 },
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+ if (ST.hasVInstructionsI64 ())
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+ LoadStoreActions.legalForTypesWithMemDesc ({{nxv1s64, p0, nxv1s64, 64 },
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+ {nxv2s64, p0, nxv2s64, 64 },
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+ {nxv4s64, p0, nxv4s64, 64 },
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+ {nxv8s64, p0, nxv8s64, 64 }});
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- {nxv2s64, p0, nxv2s64, 64 },
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- {nxv4s64, p0, nxv4s64, 64 },
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- {nxv8s64, p0, nxv8s64, 64 }});
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+ // we will take the custom lowering logic if we have scalable vector types
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+ // with non-standard alignments
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+ LoadStoreActions.customIf (
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+ LegalityPredicates::any (typeIsLegalIntOrFPVec (0 , IntOrFPVecTys, ST),
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+ typeIsLegalPtrVec (0 , PtrVecTys, ST)));
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+ }
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LoadStoreActions.widenScalarToNextPow2 (0 , /* MinSize = */ 8 )
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.lowerIfMemSizeNotByteSizePow2 ()
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- // we will take the custom lowering logic if we have scalable vector types
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- // with non-standard alignments
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- .customIf (LegalityPredicate (
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- LegalityPredicates::any (typeIsLegalIntOrFPVec (0 , IntOrFPVecTys, ST),
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- typeIsLegalPtrVec (0 , PtrVecTys, ST))))
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.clampScalar (0 , s32, sXLen )
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.lower ();
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