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-159
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8 files changed

+21
-159
lines changed

‎llvm/include/llvm/Support/X86DisassemblerDecoderCommon.h

Lines changed: 0 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -140,9 +140,7 @@ enum attributeBits {
140140
ENUM_ENTRY(IC_EVEX, 1, "requires an EVEX prefix") \
141141
ENUM_ENTRY(IC_EVEX_NF, 2, "requires EVEX and NF prefix") \
142142
ENUM_ENTRY(IC_EVEX_XS, 2, "requires EVEX and the XS prefix") \
143-
ENUM_ENTRY(IC_EVEX_XS_ADSIZE, 3, "requires EVEX, XS and the ADSIZE prefix") \
144143
ENUM_ENTRY(IC_EVEX_XD, 2, "requires EVEX and the XD prefix") \
145-
ENUM_ENTRY(IC_EVEX_XD_ADSIZE, 3, "requires EVEX, XD and the ADSIZE prefix") \
146144
ENUM_ENTRY(IC_EVEX_OPSIZE, 2, "requires EVEX and the OpSize prefix") \
147145
ENUM_ENTRY(IC_EVEX_OPSIZE_NF, 3, "requires EVEX, NF and the OpSize prefix") \
148146
ENUM_ENTRY(IC_EVEX_OPSIZE_ADSIZE, 3, \

‎llvm/lib/Target/X86/Disassembler/X86Disassembler.cpp

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -941,9 +941,6 @@ static bool readOpcode(struct InternalInstruction *insn) {
941941
case VEX_LOB_MAP6:
942942
insn->opcodeType = MAP6;
943943
return consume(insn, insn->opcode);
944-
case VEX_LOB_MAP7:
945-
insn->opcodeType = MAP7;
946-
return consume(insn, insn->opcode);
947944
}
948945
} else if (insn->vectorExtensionType == TYPE_VEX_3B) {
949946
switch (mmmmmFromVEX2of3(insn->vectorExtensionPrefix[1])) {

‎llvm/lib/Target/X86/X86InstrSystem.td

Lines changed: 14 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -436,34 +436,21 @@ def WRMSRLIST : I<0x01, MRM_C6, (outs), (ins), "wrmsrlist", []>, TB, XS;
436436
def RDMSRLIST : I<0x01, MRM_C6, (outs), (ins), "rdmsrlist", []>, TB, XD;
437437
}
438438

439-
multiclass Urdwrmsr<Map rrmap, string suffix> {
440-
let mayLoad = 1 in {
441-
let OpMap = rrmap in
442-
def URDMSRrr#suffix : I<0xf8, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src),
443-
"urdmsr\t{$src, $dst|$dst, $src}",
444-
[(set GR64:$dst, (int_x86_urdmsr GR64:$src))]>, XD, NoCD8;
445-
def URDMSRri#suffix : Ii32<0xf8, MRM0r, (outs GR64:$dst), (ins i64i32imm:$imm),
446-
"urdmsr\t{$imm, $dst|$dst, $imm}",
447-
[(set GR64:$dst, (int_x86_urdmsr i64immSExt32_su:$imm))]>,
448-
T_MAP7, VEX, XD, NoCD8;
439+
let Predicates = [HasUSERMSR], mayLoad = 1 in {
440+
def URDMSRrr : I<0xf8, MRMSrcReg, (outs GR64:$dst), (ins GR64:$src),
441+
"urdmsr\t{$src, $dst|$dst, $src}",
442+
[(set GR64:$dst, (int_x86_urdmsr GR64:$src))]>, T8, XD;
443+
def URDMSRri : Ii32<0xf8, MRM0r, (outs GR64:$dst), (ins i64i32imm:$imm),
444+
"urdmsr\t{$imm, $dst|$dst, $imm}",
445+
[(set GR64:$dst, (int_x86_urdmsr i64immSExt32_su:$imm))]>, T_MAP7, XD, VEX;
449446
}
450-
let mayStore = 1 in {
451-
let OpMap = rrmap in
452-
def UWRMSRrr#suffix : I<0xf8, MRMSrcReg, (outs), (ins GR64:$src1, GR64:$src2),
453-
"uwrmsr\t{$src2, $src1|$src1, $src2}",
454-
[(int_x86_uwrmsr GR64:$src1, GR64:$src2)]>, XS, NoCD8;
455-
def UWRMSRir#suffix : Ii32<0xf8, MRM0r, (outs), (ins GR64:$src, i64i32imm:$imm),
456-
"uwrmsr\t{$src, $imm|$imm, $src}",
457-
[(int_x86_uwrmsr i64immSExt32_su:$imm, GR64:$src)]>,
458-
T_MAP7, VEX, XS, NoCD8;
459-
}
460-
}
461-
462-
let Predicates = [HasUSERMSR, NoEGPR] in
463-
defm "" : Urdwrmsr<T8, "">;
464-
465-
let Predicates = [HasUSERMSR, HasEGPR, In64BitMode] in
466-
defm "" : Urdwrmsr<T_MAP4, "_EVEX">, EVEX;
447+
let Predicates = [HasUSERMSR], mayStore = 1 in {
448+
def UWRMSRrr : I<0xf8, MRMSrcReg, (outs), (ins GR64:$src1, GR64:$src2),
449+
"uwrmsr\t{$src2, $src1|$src1, $src2}",
450+
[(int_x86_uwrmsr GR64:$src1, GR64:$src2)]>, T8, XS;
451+
def UWRMSRir : Ii32<0xf8, MRM0r, (outs), (ins GR64:$src, i64i32imm:$imm),
452+
"uwrmsr\t{$src, $imm|$imm, $src}",
453+
[(int_x86_uwrmsr i64immSExt32_su:$imm, GR64:$src)]>, T_MAP7, XS, VEX;
467454

468455
let Defs = [RAX, RDX], Uses = [ECX] in
469456
def RDPMC : I<0x33, RawFrm, (outs), (ins), "rdpmc", []>, TB;

‎llvm/test/MC/Disassembler/X86/apx/user-msr.txt

Lines changed: 0 additions & 38 deletions
This file was deleted.

‎llvm/test/MC/X86/apx/user-msr-att.s

Lines changed: 0 additions & 41 deletions
This file was deleted.

‎llvm/test/MC/X86/apx/user-msr-intel.s

Lines changed: 0 additions & 37 deletions
This file was deleted.

‎llvm/utils/TableGen/X86DisassemblerTables.cpp

Lines changed: 1 addition & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -214,8 +214,6 @@ static inline bool inheritsFrom(InstructionContext child,
214214
(VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) ||
215215
(VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE));
216216
case IC_EVEX_OPSIZE_ADSIZE:
217-
case IC_EVEX_XS_ADSIZE:
218-
case IC_EVEX_XD_ADSIZE:
219217
return false;
220218
case IC_EVEX_K:
221219
return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
@@ -896,12 +894,8 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
896894
for (unsigned index = 0; index < ATTR_max; ++index) {
897895
o.indent(i * 2);
898896

899-
if ((index & ATTR_EVEX) && (index & ATTR_ADSIZE) && (index & ATTR_OPSIZE))
897+
if ((index & ATTR_EVEX) && (index & ATTR_OPSIZE) && (index & ATTR_ADSIZE))
900898
o << "IC_EVEX_OPSIZE_ADSIZE";
901-
else if ((index & ATTR_EVEX) && (index & ATTR_ADSIZE) && (index & ATTR_XD))
902-
o << "IC_EVEX_XD_ADSIZE";
903-
else if ((index & ATTR_EVEX) && (index & ATTR_ADSIZE) && (index & ATTR_XS))
904-
o << "IC_EVEX_XS_ADSIZE";
905899
else if (index & ATTR_EVEXNF) {
906900
o << "IC_EVEX";
907901
if (index & ATTR_REXW)

‎llvm/utils/TableGen/X86RecognizableInstr.cpp

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -188,7 +188,6 @@ void RecognizableInstr::processInstr(DisassemblerTables &tables,
188188

189189
#define EVEX_NF(n) (HasEVEX_NF ? n##_NF : n)
190190
#define EVEX_B_NF(n) (HasEVEX_B ? EVEX_NF(n##_B) : EVEX_NF(n))
191-
#define EVEX_KB_ADSIZE(n) AdSize == X86Local::AdSize32 ? n##_ADSIZE : EVEX_KB(n)
192191

193192
InstructionContext RecognizableInstr::insnContext() const {
194193
InstructionContext insnContext;
@@ -278,11 +277,14 @@ InstructionContext RecognizableInstr::insnContext() const {
278277
}
279278
// No L, no W
280279
else if (OpPrefix == X86Local::PD) {
281-
insnContext = EVEX_KB_ADSIZE(IC_EVEX_OPSIZE);
280+
if (AdSize == X86Local::AdSize32)
281+
insnContext = IC_EVEX_OPSIZE_ADSIZE;
282+
else
283+
insnContext = EVEX_KB(IC_EVEX_OPSIZE);
282284
} else if (OpPrefix == X86Local::XD)
283-
insnContext = EVEX_KB_ADSIZE(IC_EVEX_XD);
285+
insnContext = EVEX_KB(IC_EVEX_XD);
284286
else if (OpPrefix == X86Local::XS)
285-
insnContext = EVEX_KB_ADSIZE(IC_EVEX_XS);
287+
insnContext = EVEX_KB(IC_EVEX_XS);
286288
else if (OpPrefix == X86Local::PS)
287289
insnContext = EVEX_KB(IC_EVEX);
288290
else {

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