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[llvm][AArch64] Fix a crash with an incorrect asm constraint (#98071)
Fixes: rdar://130887714
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llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

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@@ -11481,6 +11481,8 @@ AArch64TargetLowering::getRegForInlineAsmConstraint(
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return std::make_pair(0U, &AArch64::ZPRRegClass);
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return std::make_pair(0U, nullptr);
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}
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if (VT == MVT::Other)
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break;
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uint64_t VTSize = VT.getFixedSizeInBits();
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if (VTSize == 16)
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return std::make_pair(0U, &AArch64::FPR16RegClass);
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; RUN: not llc < %s -o - 2>&1 | FileCheck %s
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target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128-Fn32"
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target triple = "arm64-apple-macosx"
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%struct.uint64x2x4_t = type { [4 x <2 x i64>] }
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define i64 @rdar130887714(ptr noundef %0) {
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%2 = alloca ptr, align 8
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%3 = alloca %struct.uint64x2x4_t, align 16
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store ptr %0, ptr %2, align 8
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%4 = load ptr, ptr %2, align 8
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call void asm sideeffect "ld1 { $0.2d, ${0:T}.2d, ${0:U}.2d, ${0:V}.2d} , [$1]", "*w,r"(ptr elementtype(%struct.uint64x2x4_t) %3, ptr %4) #0, !srcloc !0
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; CHECK: error: Don't know how to handle indirect register inputs yet for constraint 'w' at line 250
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%5 = getelementptr inbounds %struct.uint64x2x4_t, ptr %3, i32 0, i32 0
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%6 = getelementptr inbounds [4 x <2 x i64>], ptr %5, i64 0, i64 0
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%7 = load <2 x i64>, ptr %6, align 16
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%8 = extractelement <2 x i64> %7, i32 1
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ret i64 %8
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}
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!0 = !{i64 250}

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