@@ -629,9 +629,15 @@ let SubtargetPredicate = isGFX9Only in {
629
629
630
630
631
631
// Similar to VOPProfile_Base_CVT_F32_F8, but for VOP3 instructions.
632
- def VOPProfile_Base_CVT_PK_F32_F8_OpSel : VOPProfileI2F < v2f32, i32> {
632
+ def VOPProfile_Base_CVT_PK_F32_F8_OpSel : VOPProfile<[ v2f32, i32, untyped, untyped] > {
633
633
let HasOpSel = 1;
634
+ let HasClamp = 0;
635
+ let HasOMod = 0;
636
+ let HasExtDPP = 0;
634
637
let HasExtVOP3DPP = 0;
638
+ let AsmVOP3Base = getAsmVOP3Base<NumSrcArgs, HasDst, HasClamp,
639
+ HasOpSel, HasOMod, IsVOP3P, 0 /*HasModifiers*/, 0/*Src0HasMods*/, 0/*Src1HasMods*/,
640
+ 0/*Src2HasMods*/, DstVT>.ret;
635
641
}
636
642
637
643
class VOPProfile_Base_CVT_F_F8_ByteSel<ValueType DstVT> : VOPProfile<[DstVT, i32, untyped, untyped]> {
@@ -678,7 +684,7 @@ class Cvt_PK_F32_F8_Pat_OpSel<SDPatternOperator node, int index,
678
684
VOP1_Pseudo inst_e32, VOP3_Pseudo inst_e64> : GCNPat<
679
685
(v2f32 (node i32:$src, index)),
680
686
!if (index,
681
- (inst_e64 SRCMODS.OP_SEL_0, $src, 0, 0, SRCMODS.NONE ),
687
+ (inst_e64 SRCMODS.OP_SEL_0, $src, 0),
682
688
(inst_e32 $src))
683
689
>;
684
690
0 commit comments