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Autogenerate a indvars test for ease of update in future change
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‎llvm/test/Transforms/IndVarSimplify/ada-loops.ll

Lines changed: 108 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,4 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 3
12
; RUN: opt < %s -passes=indvars -S | FileCheck %s
23
;
34
; PR1301
@@ -15,85 +16,142 @@
1516
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-n8:16:32"
1617
target triple = "i686-pc-linux-gnu"
1718

18-
; CHECK-LABEL: @kinds__sbytezero
19-
; CHECK: bb.thread:
20-
; CHECK: sext
21-
; CHECK: bb:
22-
; CHECK-NOT: {{sext i8|zext i8|add i8|trunc}}
23-
2419
define void @kinds__sbytezero(ptr nocapture %a) nounwind {
20+
; CHECK-LABEL: define void @kinds__sbytezero(
21+
; CHECK-SAME: ptr nocapture [[A:%.*]]) #[[ATTR0:[0-9]+]] {
22+
; CHECK-NEXT: bb.thread:
23+
; CHECK-NEXT: [[TMP46:%.*]] = getelementptr [256 x i32], ptr [[A]], i32 0, i32 0
24+
; CHECK-NEXT: store i32 0, ptr [[TMP46]], align 4
25+
; CHECK-NEXT: [[SEXT:%.*]] = sext i8 127 to i32
26+
; CHECK-NEXT: br label [[BB:%.*]]
27+
; CHECK: bb:
28+
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[BB]] ], [ -128, [[BB_THREAD:%.*]] ]
29+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i32 [[INDVARS_IV]], 1
30+
; CHECK-NEXT: [[TMP3:%.*]] = add nsw i32 [[INDVARS_IV_NEXT]], 128
31+
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr [256 x i32], ptr [[A]], i32 0, i32 [[TMP3]]
32+
; CHECK-NEXT: store i32 0, ptr [[TMP4]], align 4
33+
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[INDVARS_IV_NEXT]], [[SEXT]]
34+
; CHECK-NEXT: br i1 [[TMP0]], label [[RETURN:%.*]], label [[BB]]
35+
; CHECK: return:
36+
; CHECK-NEXT: ret void
37+
;
2538
bb.thread:
26-
%tmp46 = getelementptr [256 x i32], ptr %a, i32 0, i32 0 ; <ptr> [#uses=1]
27-
store i32 0, ptr %tmp46
28-
br label %bb
39+
%tmp46 = getelementptr [256 x i32], ptr %a, i32 0, i32 0 ; <ptr> [#uses=1]
40+
store i32 0, ptr %tmp46
41+
br label %bb
2942

3043
bb: ; preds = %bb, %bb.thread
31-
%i.0.reg2mem.0 = phi i8 [ -128, %bb.thread ], [ %tmp8, %bb ] ; <i8> [#uses=1]
32-
%tmp8 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=3]
33-
%tmp1 = sext i8 %tmp8 to i32 ; <i32> [#uses=1]
34-
%tmp3 = add i32 %tmp1, 128 ; <i32> [#uses=1]
35-
%tmp4 = getelementptr [256 x i32], ptr %a, i32 0, i32 %tmp3 ; <ptr> [#uses=1]
36-
store i32 0, ptr %tmp4
37-
%0 = icmp eq i8 %tmp8, 127 ; <i1> [#uses=1]
38-
br i1 %0, label %return, label %bb
44+
%i.0.reg2mem.0 = phi i8 [ -128, %bb.thread ], [ %tmp8, %bb ] ; <i8> [#uses=1]
45+
%tmp8 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=3]
46+
%tmp1 = sext i8 %tmp8 to i32 ; <i32> [#uses=1]
47+
%tmp3 = add i32 %tmp1, 128 ; <i32> [#uses=1]
48+
%tmp4 = getelementptr [256 x i32], ptr %a, i32 0, i32 %tmp3 ; <ptr> [#uses=1]
49+
store i32 0, ptr %tmp4
50+
%0 = icmp eq i8 %tmp8, 127 ; <i1> [#uses=1]
51+
br i1 %0, label %return, label %bb
3952

4053
return: ; preds = %bb
41-
ret void
54+
ret void
4255
}
4356

44-
; CHECK-LABEL: @kinds__ubytezero
4557

4658
define void @kinds__ubytezero(ptr nocapture %a) nounwind {
59+
; CHECK-LABEL: define void @kinds__ubytezero(
60+
; CHECK-SAME: ptr nocapture [[A:%.*]]) #[[ATTR0]] {
61+
; CHECK-NEXT: bb.thread:
62+
; CHECK-NEXT: [[TMP35:%.*]] = getelementptr [256 x i32], ptr [[A]], i32 0, i32 0
63+
; CHECK-NEXT: store i32 0, ptr [[TMP35]], align 4
64+
; CHECK-NEXT: br label [[BB:%.*]]
65+
; CHECK: bb:
66+
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[BB]] ], [ 0, [[BB_THREAD:%.*]] ]
67+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1
68+
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr [256 x i32], ptr [[A]], i32 0, i32 [[INDVARS_IV_NEXT]]
69+
; CHECK-NEXT: store i32 0, ptr [[TMP3]], align 4
70+
; CHECK-NEXT: [[TMP0:%.*]] = icmp eq i32 [[INDVARS_IV_NEXT]], 255
71+
; CHECK-NEXT: br i1 [[TMP0]], label [[RETURN:%.*]], label [[BB]]
72+
; CHECK: return:
73+
; CHECK-NEXT: ret void
74+
;
4775
bb.thread:
48-
%tmp35 = getelementptr [256 x i32], ptr %a, i32 0, i32 0 ; <ptr> [#uses=1]
49-
store i32 0, ptr %tmp35
50-
br label %bb
76+
%tmp35 = getelementptr [256 x i32], ptr %a, i32 0, i32 0 ; <ptr> [#uses=1]
77+
store i32 0, ptr %tmp35
78+
br label %bb
5179

5280
bb: ; preds = %bb, %bb.thread
53-
%i.0.reg2mem.0 = phi i8 [ 0, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=1]
54-
%tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=3]
55-
%tmp1 = zext i8 %tmp7 to i32 ; <i32> [#uses=1]
56-
%tmp3 = getelementptr [256 x i32], ptr %a, i32 0, i32 %tmp1 ; <ptr> [#uses=1]
57-
store i32 0, ptr %tmp3
58-
%0 = icmp eq i8 %tmp7, -1 ; <i1> [#uses=1]
59-
br i1 %0, label %return, label %bb
81+
%i.0.reg2mem.0 = phi i8 [ 0, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=1]
82+
%tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=3]
83+
%tmp1 = zext i8 %tmp7 to i32 ; <i32> [#uses=1]
84+
%tmp3 = getelementptr [256 x i32], ptr %a, i32 0, i32 %tmp1 ; <ptr> [#uses=1]
85+
store i32 0, ptr %tmp3
86+
%0 = icmp eq i8 %tmp7, -1 ; <i1> [#uses=1]
87+
br i1 %0, label %return, label %bb
6088

6189
return: ; preds = %bb
62-
ret void
90+
ret void
6391
}
6492

6593
define void @kinds__srangezero(ptr nocapture %a) nounwind {
94+
; CHECK-LABEL: define void @kinds__srangezero(
95+
; CHECK-SAME: ptr nocapture [[A:%.*]]) #[[ATTR0]] {
96+
; CHECK-NEXT: bb.thread:
97+
; CHECK-NEXT: br label [[BB:%.*]]
98+
; CHECK: bb:
99+
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[BB]] ], [ -10, [[BB_THREAD:%.*]] ]
100+
; CHECK-NEXT: [[TMP4:%.*]] = add nsw i32 [[INDVARS_IV]], 10
101+
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr [21 x i32], ptr [[A]], i32 0, i32 [[TMP4]]
102+
; CHECK-NEXT: store i32 0, ptr [[TMP5]], align 4
103+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nsw i32 [[INDVARS_IV]], 1
104+
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INDVARS_IV_NEXT]], 11
105+
; CHECK-NEXT: br i1 [[EXITCOND]], label [[RETURN:%.*]], label [[BB]]
106+
; CHECK: return:
107+
; CHECK-NEXT: ret void
108+
;
66109
bb.thread:
67-
br label %bb
110+
br label %bb
68111

69112
bb: ; preds = %bb, %bb.thread
70-
%i.0.reg2mem.0 = phi i8 [ -10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2]
71-
%tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1]
72-
%tmp4 = add i32 %tmp12, 10 ; <i32> [#uses=1]
73-
%tmp5 = getelementptr [21 x i32], ptr %a, i32 0, i32 %tmp4 ; <ptr> [#uses=1]
74-
store i32 0, ptr %tmp5
75-
%tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2]
76-
%0 = icmp sgt i8 %tmp7, 10 ; <i1> [#uses=1]
77-
br i1 %0, label %return, label %bb
113+
%i.0.reg2mem.0 = phi i8 [ -10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2]
114+
%tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1]
115+
%tmp4 = add i32 %tmp12, 10 ; <i32> [#uses=1]
116+
%tmp5 = getelementptr [21 x i32], ptr %a, i32 0, i32 %tmp4 ; <ptr> [#uses=1]
117+
store i32 0, ptr %tmp5
118+
%tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2]
119+
%0 = icmp sgt i8 %tmp7, 10 ; <i1> [#uses=1]
120+
br i1 %0, label %return, label %bb
78121

79122
return: ; preds = %bb
80-
ret void
123+
ret void
81124
}
82125

83126
define void @kinds__urangezero(ptr nocapture %a) nounwind {
127+
; CHECK-LABEL: define void @kinds__urangezero(
128+
; CHECK-SAME: ptr nocapture [[A:%.*]]) #[[ATTR0]] {
129+
; CHECK-NEXT: bb.thread:
130+
; CHECK-NEXT: br label [[BB:%.*]]
131+
; CHECK: bb:
132+
; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i32 [ [[INDVARS_IV_NEXT:%.*]], [[BB]] ], [ 10, [[BB_THREAD:%.*]] ]
133+
; CHECK-NEXT: [[TMP4:%.*]] = add nsw i32 [[INDVARS_IV]], -10
134+
; CHECK-NEXT: [[TMP5:%.*]] = getelementptr [21 x i32], ptr [[A]], i32 0, i32 [[TMP4]]
135+
; CHECK-NEXT: store i32 0, ptr [[TMP5]], align 4
136+
; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i32 [[INDVARS_IV]], 1
137+
; CHECK-NEXT: [[EXITCOND:%.*]] = icmp eq i32 [[INDVARS_IV_NEXT]], 31
138+
; CHECK-NEXT: br i1 [[EXITCOND]], label [[RETURN:%.*]], label [[BB]]
139+
; CHECK: return:
140+
; CHECK-NEXT: ret void
141+
;
84142
bb.thread:
85-
br label %bb
143+
br label %bb
86144

87145
bb: ; preds = %bb, %bb.thread
88-
%i.0.reg2mem.0 = phi i8 [ 10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2]
89-
%tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1]
90-
%tmp4 = add i32 %tmp12, -10 ; <i32> [#uses=1]
91-
%tmp5 = getelementptr [21 x i32], ptr %a, i32 0, i32 %tmp4 ; <ptr> [#uses=1]
92-
store i32 0, ptr %tmp5
93-
%tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2]
94-
%0 = icmp sgt i8 %tmp7, 30 ; <i1> [#uses=1]
95-
br i1 %0, label %return, label %bb
146+
%i.0.reg2mem.0 = phi i8 [ 10, %bb.thread ], [ %tmp7, %bb ] ; <i8> [#uses=2]
147+
%tmp12 = sext i8 %i.0.reg2mem.0 to i32 ; <i32> [#uses=1]
148+
%tmp4 = add i32 %tmp12, -10 ; <i32> [#uses=1]
149+
%tmp5 = getelementptr [21 x i32], ptr %a, i32 0, i32 %tmp4 ; <ptr> [#uses=1]
150+
store i32 0, ptr %tmp5
151+
%tmp7 = add i8 %i.0.reg2mem.0, 1 ; <i8> [#uses=2]
152+
%0 = icmp sgt i8 %tmp7, 30 ; <i1> [#uses=1]
153+
br i1 %0, label %return, label %bb
96154

97155
return: ; preds = %bb
98-
ret void
156+
ret void
99157
}

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