Skip to content

Commit 801e6aa

Browse files
committed
[X86] Add slow div64/lea3 tuning flags to Nehalem target
I'm confident TuningSlowDivide64 should be set, but less so about TuningSlow3OpsLEA - I'm mainly assuming because most other Intel CPUs set it. These appear to have been missed because later cpus don't inherit from Nehalem tuning much. Noticed while cleaning up for #90985
1 parent 77d8c38 commit 801e6aa

File tree

3 files changed

+5
-2
lines changed

3 files changed

+5
-2
lines changed

llvm/lib/Target/X86/X86.td

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -873,6 +873,8 @@ def ProcessorFeatures {
873873
// Nehalem
874874
list<SubtargetFeature> NHMFeatures = X86_64V2Features;
875875
list<SubtargetFeature> NHMTuning = [TuningMacroFusion,
876+
TuningSlow3OpsLEA,
877+
TuningSlowDivide64,
876878
TuningInsertVZEROUPPER,
877879
TuningNoDomainDelayMov];
878880

llvm/test/CodeGen/X86/2008-08-31-EH_RETURN32.ll

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,8 @@ define ptr @test1(i32 %a, ptr %b) nounwind {
2020
; CHECK-NEXT: movl 12(%ebp), %ecx
2121
; CHECK-NEXT: movl 8(%ebp), %eax
2222
; CHECK-NEXT: movl %ecx, 4(%ebp,%eax)
23-
; CHECK-NEXT: leal 4(%ebp,%eax), %ecx
23+
; CHECK-NEXT: leal (%eax,%ebp), %ecx
24+
; CHECK-NEXT: addl $4, %ecx
2425
; CHECK-NEXT: addl $4, %esp
2526
; CHECK-NEXT: popl %eax
2627
; CHECK-NEXT: popl %edx

llvm/test/CodeGen/X86/bypass-slow-division-64.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v3 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
88
; RUN: llc < %s -mtriple=x86_64-- -mcpu=x86-64-v4 | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
99
; Intel
10-
; RUN: llc < %s -mtriple=x86_64-- -mcpu=nehalem | FileCheck %s --check-prefixes=CHECK,FAST-DIVQ
10+
; RUN: llc < %s -mtriple=x86_64-- -mcpu=nehalem | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
1111
; RUN: llc < %s -mtriple=x86_64-- -mcpu=sandybridge | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
1212
; RUN: llc < %s -mtriple=x86_64-- -mcpu=haswell | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ
1313
; RUN: llc < %s -mtriple=x86_64-- -mcpu=skylake | FileCheck %s --check-prefixes=CHECK,SLOW-DIVQ

0 commit comments

Comments
 (0)