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Add support for Arm Cortex A78AE CPU (#84485)
Add support for Arm Cortex A78AE CPU Technical Reference Manual for Arm Cortex A78AE: https://developer.arm.com/documentation/101779/0003 Fixes #84450
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‎clang/docs/ReleaseNotes.rst

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@@ -388,6 +388,8 @@ Arm and AArch64 Support
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instructions (rdm). The identifier is available on the command line as
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a feature modifier for -march and -mcpu as well as via target attributes
390390
like ``target_version`` or ``target_clones``.
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- Support has been added for the following processors (-mcpu identifiers in parenthesis):
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* Arm Cortex-A78AE (cortex-a78ae).
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Android Support
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^^^^^^^^^^^^^^^

‎clang/test/Driver/aarch64-mcpu.c

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@@ -50,6 +50,8 @@
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// CORTEXA78: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "cortex-a78"
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// RUN: %clang --target=aarch64 -mcpu=cortex-a78c -### -c %s 2>&1 | FileCheck -check-prefix=CORTEX-A78C %s
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// CORTEX-A78C: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "cortex-a78c"
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// RUN: %clang --target=aarch64 -mcpu=cortex-a78ae -### -c %s 2>&1 | FileCheck -check-prefix=CORTEX-A78AE %s
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// CORTEX-A78AE: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "cortex-a78ae"
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// RUN: %clang --target=aarch64 -mcpu=cortex-a715 -### -c %s 2>&1 | FileCheck -check-prefix=CORTEX-A715 %s
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// CORTEX-A715: "-cc1"{{.*}} "-triple" "aarch64{{.*}}" "-target-cpu" "cortex-a715"
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// RUN: %clang --target=aarch64 -mcpu=cortex-a720 -### -c %s 2>&1 | FileCheck -check-prefix=CORTEX-A720 %s

‎clang/test/Driver/arm-cortex-cpus-2.c

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@@ -537,6 +537,13 @@
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// CHECK-CORTEX-A78C-MFPU: "-target-feature" "+sha2"
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// CHECK-CORTEX-A78C-MFPU: "-target-feature" "+aes"
539539

540+
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a78ae -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A78AE %s
541+
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a78ae -mfpu=crypto-neon-fp-armv8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A78AE-MFPU %s
542+
// CHECK-CORTEX-A78AE: "-cc1"{{.*}} "-triple" "armv8.2a-{{.*}} "-target-cpu" "cortex-a78ae"
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// CHECK-CORTEX-A78AE-MFPU: "-cc1"{{.*}} "-target-feature" "+fp-armv8"
544+
// CHECK-CORTEX-A78AE-MFPU: "-target-feature" "+sha2"
545+
// CHECK-CORTEX-A78AE-MFPU: "-target-feature" "+aes"
546+
540547
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a710 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A710 %s
541548
// RUN: %clang -target armv8a-arm-none-eabi -mcpu=cortex-a710 -mfpu=crypto-neon-fp-armv8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CORTEX-A710-MFPU %s
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// CHECK-CORTEX-A710: "-cc1"{{.*}} "-triple" "armv9a-{{.*}} "-target-cpu" "cortex-a710"

‎clang/test/Misc/target-invalid-cpu-note.c

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@@ -1,15 +1,15 @@
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// Use CHECK-NEXT instead of multiple CHECK-SAME to ensure we will fail if there is anything extra in the output.
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// RUN: not %clang_cc1 -triple armv5--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix ARM
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// ARM: error: unknown target CPU 'not-a-cpu'
4-
// ARM-NEXT: note: valid target CPU values are: arm8, arm810, strongarm, strongarm110, strongarm1100, strongarm1110, arm7tdmi, arm7tdmi-s, arm710t, arm720t, arm9, arm9tdmi, arm920, arm920t, arm922t, arm940t, ep9312, arm10tdmi, arm1020t, arm9e, arm946e-s, arm966e-s, arm968e-s, arm10e, arm1020e, arm1022e, arm926ej-s, arm1136j-s, arm1136jf-s, mpcore, mpcorenovfp, arm1176jz-s, arm1176jzf-s, arm1156t2-s, arm1156t2f-s, cortex-m0, cortex-m0plus, cortex-m1, sc000, cortex-a5, cortex-a7, cortex-a8, cortex-a9, cortex-a12, cortex-a15, cortex-a17, krait, cortex-r4, cortex-r4f, cortex-r5, cortex-r7, cortex-r8, cortex-r52, sc300, cortex-m3, cortex-m4, cortex-m7, cortex-m23, cortex-m33, cortex-m35p, cortex-m55, cortex-m85, cortex-m52, cortex-a32, cortex-a35, cortex-a53, cortex-a55, cortex-a57, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78c, cortex-a710, cortex-x1, cortex-x1c, neoverse-n1, neoverse-n2, neoverse-v1, cyclone, exynos-m3, exynos-m4, exynos-m5, kryo, iwmmxt, xscale, swift{{$}}
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// ARM-NEXT: note: valid target CPU values are: arm8, arm810, strongarm, strongarm110, strongarm1100, strongarm1110, arm7tdmi, arm7tdmi-s, arm710t, arm720t, arm9, arm9tdmi, arm920, arm920t, arm922t, arm940t, ep9312, arm10tdmi, arm1020t, arm9e, arm946e-s, arm966e-s, arm968e-s, arm10e, arm1020e, arm1022e, arm926ej-s, arm1136j-s, arm1136jf-s, mpcore, mpcorenovfp, arm1176jz-s, arm1176jzf-s, arm1156t2-s, arm1156t2f-s, cortex-m0, cortex-m0plus, cortex-m1, sc000, cortex-a5, cortex-a7, cortex-a8, cortex-a9, cortex-a12, cortex-a15, cortex-a17, krait, cortex-r4, cortex-r4f, cortex-r5, cortex-r7, cortex-r8, cortex-r52, sc300, cortex-m3, cortex-m4, cortex-m7, cortex-m23, cortex-m33, cortex-m35p, cortex-m55, cortex-m85, cortex-m52, cortex-a32, cortex-a35, cortex-a53, cortex-a55, cortex-a57, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78ae, cortex-a78c, cortex-a710, cortex-x1, cortex-x1c, neoverse-n1, neoverse-n2, neoverse-v1, cyclone, exynos-m3, exynos-m4, exynos-m5, kryo, iwmmxt, xscale, swift{{$}}
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// RUN: not %clang_cc1 -triple arm64--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix AARCH64
77
// AARCH64: error: unknown target CPU 'not-a-cpu'
8-
// AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a520, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78c, cortex-a710, cortex-a715, cortex-a720, cortex-r82, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, cortex-x4, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-512tvb, neoverse-v1, neoverse-v2, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-a17, apple-m1, apple-m2, apple-m3, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, ampere1b, cobalt-100, grace{{$}}
8+
// AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a520, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78ae, cortex-a78c, cortex-a710, cortex-a715, cortex-a720, cortex-r82, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, cortex-x4, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-512tvb, neoverse-v1, neoverse-v2, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-a17, apple-m1, apple-m2, apple-m3, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, ampere1b, cobalt-100, grace{{$}}
99

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// RUN: not %clang_cc1 -triple arm64--- -tune-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix TUNE_AARCH64
1111
// TUNE_AARCH64: error: unknown target CPU 'not-a-cpu'
12-
// TUNE_AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a520, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78c, cortex-a710, cortex-a715, cortex-a720, cortex-r82, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, cortex-x4, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-512tvb, neoverse-v1, neoverse-v2, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-a17, apple-m1, apple-m2, apple-m3, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, ampere1b, cobalt-100, grace{{$}}
12+
// TUNE_AARCH64-NEXT: note: valid target CPU values are: cortex-a34, cortex-a35, cortex-a53, cortex-a55, cortex-a510, cortex-a520, cortex-a57, cortex-a65, cortex-a65ae, cortex-a72, cortex-a73, cortex-a75, cortex-a76, cortex-a76ae, cortex-a77, cortex-a78, cortex-a78ae, cortex-a78c, cortex-a710, cortex-a715, cortex-a720, cortex-r82, cortex-x1, cortex-x1c, cortex-x2, cortex-x3, cortex-x4, neoverse-e1, neoverse-n1, neoverse-n2, neoverse-512tvb, neoverse-v1, neoverse-v2, cyclone, apple-a7, apple-a8, apple-a9, apple-a10, apple-a11, apple-a12, apple-a13, apple-a14, apple-a15, apple-a16, apple-a17, apple-m1, apple-m2, apple-m3, apple-s4, apple-s5, exynos-m3, exynos-m4, exynos-m5, falkor, saphira, kryo, thunderx2t99, thunderx3t110, thunderx, thunderxt88, thunderxt81, thunderxt83, tsv110, a64fx, carmel, ampere1, ampere1a, ampere1b, cobalt-100, grace{{$}}
1313

1414
// RUN: not %clang_cc1 -triple i386--- -target-cpu not-a-cpu -fsyntax-only %s 2>&1 | FileCheck %s --check-prefix X86
1515
// X86: error: unknown target CPU 'not-a-cpu'

‎llvm/include/llvm/TargetParser/AArch64TargetParser.h

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@@ -592,6 +592,11 @@ inline constexpr CpuInfo CpuInfos[] = {
592592
AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
593593
AArch64::AEK_RCPC, AArch64::AEK_SSBS,
594594
AArch64::AEK_PROFILE})},
595+
{"cortex-a78ae", ARMV8_2A,
596+
AArch64::ExtensionBitset({AArch64::AEK_AES, AArch64::AEK_SHA2,
597+
AArch64::AEK_FP16, AArch64::AEK_DOTPROD,
598+
AArch64::AEK_RCPC, AArch64::AEK_SSBS,
599+
AArch64::AEK_PROFILE})},
595600
{"cortex-a78c", ARMV8_2A,
596601
AArch64::ExtensionBitset(
597602
{AArch64::AEK_AES, AArch64::AEK_SHA2, AArch64::AEK_FP16,

‎llvm/include/llvm/TargetParser/ARMTargetParser.def

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@@ -363,6 +363,8 @@ ARM_CPU_NAME("cortex-a77", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
363363
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
364364
ARM_CPU_NAME("cortex-a78", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
365365
(ARM::AEK_FP16 | ARM::AEK_DOTPROD))
366+
ARM_CPU_NAME("cortex-a78ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
367+
(ARM::AEK_RAS | ARM::AEK_DOTPROD))
366368
ARM_CPU_NAME("cortex-a78c", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false,
367369
ARM::AEK_FP16 | ARM::AEK_DOTPROD)
368370
ARM_CPU_NAME("cortex-a710", ARMV9A, FK_NEON_FP_ARMV8, false,

‎llvm/lib/Target/AArch64/AArch64.td

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@@ -944,6 +944,18 @@ def TuneA78 : SubtargetFeature<"a78", "ARMProcFamily", "CortexA78",
944944
FeatureEnableSelectOptimize,
945945
FeaturePredictableSelectIsExpensive]>;
946946

947+
def TuneA78AE : SubtargetFeature<"a78ae", "ARMProcFamily",
948+
"CortexA78AE",
949+
"Cortex-A78AE ARM processors", [
950+
FeatureCmpBccFusion,
951+
FeatureFuseAES,
952+
FeatureFuseAdrpAdd,
953+
FeatureAddrLSLFast,
954+
FeatureALULSLFast,
955+
FeaturePostRAScheduler,
956+
FeatureEnableSelectOptimize,
957+
FeaturePredictableSelectIsExpensive]>;
958+
947959
def TuneA78C : SubtargetFeature<"a78c", "ARMProcFamily",
948960
"CortexA78C",
949961
"Cortex-A78C ARM processors", [
@@ -1425,6 +1437,10 @@ def ProcessorFeatures {
14251437
FeatureNEON, FeatureFullFP16, FeatureDotProd,
14261438
FeatureRCPC, FeaturePerfMon, FeatureSPE,
14271439
FeatureSSBS];
1440+
list<SubtargetFeature> A78AE = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
1441+
FeatureNEON, FeatureFullFP16, FeatureDotProd,
1442+
FeatureRCPC, FeaturePerfMon, FeatureSPE,
1443+
FeatureSSBS];
14281444
list<SubtargetFeature> A78C = [HasV8_2aOps, FeatureCrypto, FeatureFPARMv8,
14291445
FeatureNEON, FeatureFullFP16, FeatureDotProd,
14301446
FeatureFlagM, FeaturePAuth,
@@ -1602,6 +1618,8 @@ def : ProcessorModel<"cortex-a77", CortexA57Model, ProcessorFeatures.A77,
16021618
[TuneA77]>;
16031619
def : ProcessorModel<"cortex-a78", CortexA57Model, ProcessorFeatures.A78,
16041620
[TuneA78]>;
1621+
def : ProcessorModel<"cortex-a78ae", CortexA57Model, ProcessorFeatures.A78AE,
1622+
[TuneA78AE]>;
16051623
def : ProcessorModel<"cortex-a78c", CortexA57Model, ProcessorFeatures.A78C,
16061624
[TuneA78C]>;
16071625
def : ProcessorModel<"cortex-a710", NeoverseN2Model, ProcessorFeatures.A710,

‎llvm/lib/Target/AArch64/AArch64Subtarget.cpp

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@@ -140,6 +140,7 @@ void AArch64Subtarget::initializeProperties(bool HasMinSize) {
140140
case CortexA76:
141141
case CortexA77:
142142
case CortexA78:
143+
case CortexA78AE:
143144
case CortexA78C:
144145
case CortexR82:
145146
case CortexX1:

‎llvm/lib/Target/AArch64/AArch64Subtarget.h

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@@ -66,6 +66,7 @@ class AArch64Subtarget final : public AArch64GenSubtargetInfo {
6666
CortexA76,
6767
CortexA77,
6868
CortexA78,
69+
CortexA78AE,
6970
CortexA78C,
7071
CortexA710,
7172
CortexA715,

‎llvm/lib/Target/ARM/ARM.td

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@@ -809,6 +809,8 @@ def ProcA77 : SubtargetFeature<"a77", "ARMProcFamily", "CortexA77",
809809
"Cortex-A77 ARM processors", []>;
810810
def ProcA78 : SubtargetFeature<"cortex-a78", "ARMProcFamily", "CortexA78",
811811
"Cortex-A78 ARM processors", []>;
812+
def ProcA78AE : SubtargetFeature<"cortex-a78ae", "ARMProcFamily", "CortexA78AE",
813+
"Cortex-A78AE ARM processors", []>;
812814
def ProcA78C : SubtargetFeature<"a78c", "ARMProcFamily", "CortexA78C",
813815
"Cortex-A78C ARM processors", []>;
814816
def ProcA710 : SubtargetFeature<"cortex-a710", "ARMProcFamily",
@@ -1632,6 +1634,14 @@ def : ProcNoItin<"cortex-a78", [ARMv82a, ProcA78,
16321634
FeatureFullFP16,
16331635
FeatureDotProd]>;
16341636

1637+
def : ProcNoItin<"cortex-a78ae", [ARMv82a, ProcA78AE,
1638+
FeatureHWDivThumb,
1639+
FeatureHWDivARM,
1640+
FeatureCrypto,
1641+
FeatureCRC,
1642+
FeatureFullFP16,
1643+
FeatureDotProd]>;
1644+
16351645
def : ProcNoItin<"cortex-a78c", [ARMv82a, ProcA78C,
16361646
FeatureHWDivThumb,
16371647
FeatureHWDivARM,

‎llvm/lib/Target/ARM/ARMSubtarget.cpp

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@@ -289,6 +289,7 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
289289
case CortexA76:
290290
case CortexA77:
291291
case CortexA78:
292+
case CortexA78AE:
292293
case CortexA78C:
293294
case CortexA710:
294295
case CortexR4:

‎llvm/lib/Target/ARM/ARMSubtarget.h

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Original file line numberDiff line numberDiff line change
@@ -66,6 +66,7 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
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CortexA76,
6767
CortexA77,
6868
CortexA78,
69+
CortexA78AE,
6970
CortexA78C,
7071
CortexA710,
7172
CortexA8,

‎llvm/lib/TargetParser/Host.cpp

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Original file line numberDiff line numberDiff line change
@@ -217,6 +217,7 @@ StringRef sys::detail::getHostCPUNameForARM(StringRef ProcCpuinfoContent) {
217217
.Case("0xd0b", "cortex-a76")
218218
.Case("0xd0d", "cortex-a77")
219219
.Case("0xd41", "cortex-a78")
220+
.Case("0xd42", "cortex-a78ae")
220221
.Case("0xd47", "cortex-a710")
221222
.Case("0xd4d", "cortex-a715")
222223
.Case("0xd81", "cortex-a720")

‎llvm/unittests/TargetParser/TargetParserTest.cpp

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Original file line numberDiff line numberDiff line change
@@ -454,6 +454,12 @@ INSTANTIATE_TEST_SUITE_P(
454454
ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
455455
ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS,
456456
"8.2-A"),
457+
ARMCPUTestParams<uint64_t>(
458+
"cortex-a78ae", "armv8.2-a", "crypto-neon-fp-armv8",
459+
ARM::AEK_RAS | ARM::AEK_DOTPROD | ARM::AEK_SEC | ARM::AEK_MP |
460+
ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
461+
ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS,
462+
"8.2-A"),
457463
ARMCPUTestParams<uint64_t>(
458464
"cortex-x1", "armv8.2-a", "crypto-neon-fp-armv8",
459465
ARM::AEK_RAS | ARM::AEK_FP16 | ARM::AEK_DOTPROD | ARM::AEK_SEC |
@@ -542,7 +548,7 @@ INSTANTIATE_TEST_SUITE_P(
542548
"7-S")),
543549
ARMCPUTestParams<uint64_t>::PrintToStringParamName);
544550

545-
static constexpr unsigned NumARMCPUArchs = 90;
551+
static constexpr unsigned NumARMCPUArchs = 91;
546552

547553
TEST(TargetParserTest, testARMCPUArchList) {
548554
SmallVector<StringRef, NumARMCPUArchs> List;
@@ -1209,6 +1215,15 @@ INSTANTIATE_TEST_SUITE_P(
12091215
AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS,
12101216
AArch64::AEK_PROFILE}),
12111217
"8.2-A"),
1218+
ARMCPUTestParams<AArch64::ExtensionBitset>(
1219+
"cortex-a78ae", "armv8.2-a", "crypto-neon-fp-armv8",
1220+
AArch64::ExtensionBitset(
1221+
{AArch64::AEK_CRC, AArch64::AEK_AES, AArch64::AEK_SHA2,
1222+
AArch64::AEK_FP, AArch64::AEK_RDM, AArch64::AEK_SIMD,
1223+
AArch64::AEK_RAS, AArch64::AEK_LSE, AArch64::AEK_FP16,
1224+
AArch64::AEK_DOTPROD, AArch64::AEK_RCPC, AArch64::AEK_SSBS,
1225+
AArch64::AEK_PROFILE}),
1226+
"8.2-A"),
12121227
ARMCPUTestParams<AArch64::ExtensionBitset>(
12131228
"cortex-a78c", "armv8.2-a", "crypto-neon-fp-armv8",
12141229
AArch64::ExtensionBitset(
@@ -1702,7 +1717,7 @@ INSTANTIATE_TEST_SUITE_P(
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ARMCPUTestParams<AArch64::ExtensionBitset>::PrintToStringParamName);
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// Note: number of CPUs includes aliases.
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static constexpr unsigned NumAArch64CPUArchs = 69;
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static constexpr unsigned NumAArch64CPUArchs = 70;
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TEST(TargetParserTest, testAArch64CPUArchList) {
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SmallVector<StringRef, NumAArch64CPUArchs> List;

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