@@ -1136,7 +1136,7 @@ static void genSingleClauses(lower::AbstractConverter &converter,
1136
1136
static void genTargetClauses (
1137
1137
lower::AbstractConverter &converter, semantics::SemanticsContext &semaCtx,
1138
1138
lower::StatementContext &stmtCtx, const List<Clause> &clauses,
1139
- mlir::Location loc, bool processHostOnlyClauses, bool processReduction,
1139
+ mlir::Location loc, bool processHostOnlyClauses,
1140
1140
mlir::omp::TargetClauseOps &clauseOps,
1141
1141
llvm::SmallVectorImpl<const semantics::Symbol *> &mapSyms,
1142
1142
llvm::SmallVectorImpl<mlir::Location> &mapLocs,
@@ -1678,7 +1678,7 @@ static mlir::omp::TargetOp
1678
1678
genTargetOp (lower::AbstractConverter &converter, lower::SymMap &symTable,
1679
1679
semantics::SemanticsContext &semaCtx, lower::pft::Evaluation &eval,
1680
1680
mlir::Location loc, const ConstructQueue &queue,
1681
- ConstructQueue::iterator item, bool outerCombined = false ) {
1681
+ ConstructQueue::iterator item) {
1682
1682
fir::FirOpBuilder &firOpBuilder = converter.getFirOpBuilder ();
1683
1683
lower::StatementContext stmtCtx;
1684
1684
@@ -1692,10 +1692,9 @@ genTargetOp(lower::AbstractConverter &converter, lower::SymMap &symTable,
1692
1692
llvm::SmallVector<mlir::Location> mapLocs, devicePtrLocs, deviceAddrLocs;
1693
1693
llvm::SmallVector<mlir::Type> mapTypes, devicePtrTypes, deviceAddrTypes;
1694
1694
genTargetClauses (converter, semaCtx, stmtCtx, item->clauses , loc,
1695
- processHostOnlyClauses, /* processReduction=*/ outerCombined,
1696
- clauseOps, mapSyms, mapLocs, mapTypes, deviceAddrSyms,
1697
- deviceAddrLocs, deviceAddrTypes, devicePtrSyms,
1698
- devicePtrLocs, devicePtrTypes);
1695
+ processHostOnlyClauses, clauseOps, mapSyms, mapLocs,
1696
+ mapTypes, deviceAddrSyms, deviceAddrLocs, deviceAddrTypes,
1697
+ devicePtrSyms, devicePtrLocs, devicePtrTypes);
1699
1698
1700
1699
llvm::SmallVector<const semantics::Symbol *> privateSyms;
1701
1700
DataSharingProcessor dsp (converter, semaCtx, item->clauses , eval,
@@ -2101,8 +2100,7 @@ static void genOMPDispatch(lower::AbstractConverter &converter,
2101
2100
genSingleOp (converter, symTable, semaCtx, eval, loc, queue, item);
2102
2101
break ;
2103
2102
case llvm::omp::Directive::OMPD_target:
2104
- genTargetOp (converter, symTable, semaCtx, eval, loc, queue, item,
2105
- /* outerCombined=*/ false );
2103
+ genTargetOp (converter, symTable, semaCtx, eval, loc, queue, item);
2106
2104
break ;
2107
2105
case llvm::omp::Directive::OMPD_target_data:
2108
2106
genTargetDataOp (converter, symTable, semaCtx, eval, loc, queue, item);
0 commit comments