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[AMDGPU][Verifier] Check address space of alloca instruction
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‎llvm/lib/IR/Verifier.cpp

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@@ -4392,6 +4392,12 @@ void Verifier::visitAllocaInst(AllocaInst &AI) {
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verifySwiftErrorValue(&AI);
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}
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if (TT.isAMDGPU()) {
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Check(AI.getAddressSpace() == AMDGPUAS::PRIVATE_ADDRESS ||
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AI.getAddressSpace() == AMDGPUAS::FLAT_ADDRESS,
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"alloca on amdgpu must be in addrspace(0) or addrspace(5)", &AI);
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}
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visitInstruction(AI);
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}
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‎llvm/test/Verifier/AMDGPU/alloca.ll

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; RUN: not llvm-as %s --disable-output 2>&1 | FileCheck %s
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target triple = "amdgcn-amd-amdhsa"
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target datalayout = "A5"
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; CHECK: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.1 = alloca i32, align 4, addrspace(1)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.2 = alloca i32, align 4, addrspace(2)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.3 = alloca i32, align 4, addrspace(3)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.4 = alloca i32, align 4, addrspace(4)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.6 = alloca i32, align 4, addrspace(6)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.7 = alloca i32, align 4, addrspace(7)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.8 = alloca i32, align 4, addrspace(8)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.9 = alloca i32, align 4, addrspace(9)
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define void @static_alloca() {
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entry:
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%alloca.0 = alloca i32, align 4
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%alloca.1 = alloca i32, align 4, addrspace(1)
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%alloca.2 = alloca i32, align 4, addrspace(2)
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%alloca.3 = alloca i32, align 4, addrspace(3)
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%alloca.4 = alloca i32, align 4, addrspace(4)
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%alloca.5 = alloca i32, align 4, addrspace(5)
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%alloca.6 = alloca i32, align 4, addrspace(6)
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%alloca.7 = alloca i32, align 4, addrspace(7)
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%alloca.8 = alloca i32, align 4, addrspace(8)
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%alloca.9 = alloca i32, align 4, addrspace(9)
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ret void
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}
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; CHECK: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.1 = alloca i32, i32 %n, align 4, addrspace(1)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.2 = alloca i32, i32 %n, align 4, addrspace(2)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.3 = alloca i32, i32 %n, align 4, addrspace(3)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.4 = alloca i32, i32 %n, align 4, addrspace(4)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.6 = alloca i32, i32 %n, align 4, addrspace(6)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.7 = alloca i32, i32 %n, align 4, addrspace(7)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.8 = alloca i32, i32 %n, align 4, addrspace(8)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.9 = alloca i32, i32 %n, align 4, addrspace(9)
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define void @dynamic_alloca_i32(i32 %n) {
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entry:
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%alloca.0 = alloca i32, i32 %n, align 4
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%alloca.1 = alloca i32, i32 %n, align 4, addrspace(1)
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%alloca.2 = alloca i32, i32 %n, align 4, addrspace(2)
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%alloca.3 = alloca i32, i32 %n, align 4, addrspace(3)
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%alloca.4 = alloca i32, i32 %n, align 4, addrspace(4)
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%alloca.5 = alloca i32, i32 %n, align 4, addrspace(5)
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%alloca.6 = alloca i32, i32 %n, align 4, addrspace(6)
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%alloca.7 = alloca i32, i32 %n, align 4, addrspace(7)
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%alloca.8 = alloca i32, i32 %n, align 4, addrspace(8)
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%alloca.9 = alloca i32, i32 %n, align 4, addrspace(9)
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ret void
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}
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; CHECK: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.1 = alloca i32, i64 %n, align 4, addrspace(1)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.2 = alloca i32, i64 %n, align 4, addrspace(2)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.3 = alloca i32, i64 %n, align 4, addrspace(3)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.4 = alloca i32, i64 %n, align 4, addrspace(4)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.6 = alloca i32, i64 %n, align 4, addrspace(6)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.7 = alloca i32, i64 %n, align 4, addrspace(7)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.8 = alloca i32, i64 %n, align 4, addrspace(8)
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; CHECK-NEXT: alloca on amdgpu must be in addrspace(0) or addrspace(5)
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; CHECK-NEXT: %alloca.9 = alloca i32, i64 %n, align 4, addrspace(9)
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define void @dynamic_alloca_i64(i64 %n) {
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entry:
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%alloca.0 = alloca i32, i64 %n, align 4
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%alloca.1 = alloca i32, i64 %n, align 4, addrspace(1)
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%alloca.2 = alloca i32, i64 %n, align 4, addrspace(2)
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%alloca.3 = alloca i32, i64 %n, align 4, addrspace(3)
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%alloca.4 = alloca i32, i64 %n, align 4, addrspace(4)
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%alloca.5 = alloca i32, i64 %n, align 4, addrspace(5)
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%alloca.6 = alloca i32, i64 %n, align 4, addrspace(6)
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%alloca.7 = alloca i32, i64 %n, align 4, addrspace(7)
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%alloca.8 = alloca i32, i64 %n, align 4, addrspace(8)
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%alloca.9 = alloca i32, i64 %n, align 4, addrspace(9)
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ret void
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}

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