|
1 | 1 | ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 2
|
2 |
| -; RUN: opt < %s -passes=loop-vectorize,interleaved-access -mtriple=aarch64-linux-gnu -mattr=+sve -S | FileCheck %s |
| 2 | +; RUN: opt < %s -passes=interleaved-access -mtriple=aarch64-linux-gnu -mattr=+sve -S | FileCheck %s |
3 | 3 |
|
4 | 4 |
|
5 | 5 | define void @deinterleave4(ptr %src) {
|
@@ -136,141 +136,3 @@ define void @negative_deinterleave4_test(ptr %src) {
|
136 | 136 |
|
137 | 137 | ret void
|
138 | 138 | }
|
139 |
| - |
140 |
| -%struct.xyzt = type { i32, i32, i32, i32 } |
141 |
| - |
142 |
| -define void @interleave_deinterleave(ptr writeonly %dst, ptr readonly %a, ptr readonly %b) { |
143 |
| -; CHECK-LABEL: define void @interleave_deinterleave |
144 |
| -; CHECK-SAME: (ptr writeonly [[DST:%.*]], ptr readonly [[A:%.*]], ptr readonly [[B:%.*]]) #[[ATTR0]] { |
145 |
| -; CHECK-NEXT: entry: |
146 |
| -; CHECK-NEXT: [[TMP0:%.*]] = call i64 @llvm.vscale.i64() |
147 |
| -; CHECK-NEXT: [[TMP1:%.*]] = mul i64 [[TMP0]], 4 |
148 |
| -; CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.umax.i64(i64 8, i64 [[TMP1]]) |
149 |
| -; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 1024, [[TMP2]] |
150 |
| -; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_MEMCHECK:%.*]] |
151 |
| -; CHECK: vector.memcheck: |
152 |
| -; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[DST]], i64 16384 |
153 |
| -; CHECK-NEXT: [[SCEVGEP1:%.*]] = getelementptr i8, ptr [[A]], i64 16384 |
154 |
| -; CHECK-NEXT: [[SCEVGEP2:%.*]] = getelementptr i8, ptr [[B]], i64 16384 |
155 |
| -; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP1]] |
156 |
| -; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult ptr [[A]], [[SCEVGEP]] |
157 |
| -; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]] |
158 |
| -; CHECK-NEXT: [[BOUND03:%.*]] = icmp ult ptr [[DST]], [[SCEVGEP2]] |
159 |
| -; CHECK-NEXT: [[BOUND14:%.*]] = icmp ult ptr [[B]], [[SCEVGEP]] |
160 |
| -; CHECK-NEXT: [[FOUND_CONFLICT5:%.*]] = and i1 [[BOUND03]], [[BOUND14]] |
161 |
| -; CHECK-NEXT: [[CONFLICT_RDX:%.*]] = or i1 [[FOUND_CONFLICT]], [[FOUND_CONFLICT5]] |
162 |
| -; CHECK-NEXT: br i1 [[CONFLICT_RDX]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]] |
163 |
| -; CHECK: vector.ph: |
164 |
| -; CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.vscale.i64() |
165 |
| -; CHECK-NEXT: [[TMP4:%.*]] = mul i64 [[TMP3]], 4 |
166 |
| -; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i64 1024, [[TMP4]] |
167 |
| -; CHECK-NEXT: [[N_VEC:%.*]] = sub i64 1024, [[N_MOD_VF]] |
168 |
| -; CHECK-NEXT: [[TMP5:%.*]] = call i64 @llvm.vscale.i64() |
169 |
| -; CHECK-NEXT: [[TMP6:%.*]] = mul i64 [[TMP5]], 4 |
170 |
| -; CHECK-NEXT: br label [[VECTOR_BODY:%.*]] |
171 |
| -; CHECK: vector.body: |
172 |
| -; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ] |
173 |
| -; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 0 |
174 |
| -; CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_XYZT:%.*]], ptr [[A]], i64 [[TMP7]] |
175 |
| -; CHECK-NEXT: [[LDN:%.*]] = call { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.ld4.sret.nxv4i32(<vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i64 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), ptr [[TMP8]]) |
176 |
| -; CHECK-NEXT: [[TMP9:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[LDN]], 0 |
177 |
| -; CHECK-NEXT: [[TMP10:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[LDN]], 1 |
178 |
| -; CHECK-NEXT: [[TMP11:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[LDN]], 2 |
179 |
| -; CHECK-NEXT: [[TMP12:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[LDN]], 3 |
180 |
| -; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_XYZT]], ptr [[B]], i64 [[TMP7]] |
181 |
| -; CHECK-NEXT: [[LDN14:%.*]] = call { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } @llvm.aarch64.sve.ld4.sret.nxv4i32(<vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i64 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), ptr [[TMP13]]) |
182 |
| -; CHECK-NEXT: [[TMP14:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[LDN14]], 0 |
183 |
| -; CHECK-NEXT: [[TMP15:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[LDN14]], 1 |
184 |
| -; CHECK-NEXT: [[TMP16:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[LDN14]], 2 |
185 |
| -; CHECK-NEXT: [[TMP17:%.*]] = extractvalue { <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32>, <vscale x 4 x i32> } [[LDN14]], 3 |
186 |
| -; CHECK-NEXT: [[TMP18:%.*]] = add nsw <vscale x 4 x i32> [[TMP14]], [[TMP9]] |
187 |
| -; CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_XYZT]], ptr [[DST]], i64 [[TMP7]] |
188 |
| -; CHECK-NEXT: [[TMP20:%.*]] = sub nsw <vscale x 4 x i32> [[TMP10]], [[TMP15]] |
189 |
| -; CHECK-NEXT: [[TMP21:%.*]] = shl <vscale x 4 x i32> [[TMP11]], [[TMP16]] |
190 |
| -; CHECK-NEXT: [[TMP22:%.*]] = ashr <vscale x 4 x i32> [[TMP12]], [[TMP17]] |
191 |
| -; CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv4i32(<vscale x 4 x i32> [[TMP18]], <vscale x 4 x i32> [[TMP20]], <vscale x 4 x i32> [[TMP21]], <vscale x 4 x i32> [[TMP22]], <vscale x 4 x i1> shufflevector (<vscale x 4 x i1> insertelement (<vscale x 4 x i1> poison, i1 true, i64 0), <vscale x 4 x i1> poison, <vscale x 4 x i32> zeroinitializer), ptr [[TMP19]]) |
192 |
| -; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP6]] |
193 |
| -; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]] |
194 |
| -; CHECK-NEXT: br i1 [[TMP23]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP0:![0-9]+]] |
195 |
| -; CHECK: middle.block: |
196 |
| -; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 1024, [[N_VEC]] |
197 |
| -; CHECK-NEXT: br i1 [[CMP_N]], label [[FOR_COND_CLEANUP:%.*]], label [[SCALAR_PH]] |
198 |
| -; CHECK: scalar.ph: |
199 |
| -; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_MEMCHECK]] ] |
200 |
| -; CHECK-NEXT: br label [[FOR_BODY:%.*]] |
201 |
| -; CHECK: for.body: |
202 |
| -; CHECK-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ] |
203 |
| -; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [[STRUCT_XYZT]], ptr [[A]], i64 [[INDVARS_IV]] |
204 |
| -; CHECK-NEXT: [[TMP24:%.*]] = load i32, ptr [[ARRAYIDX]], align 4 |
205 |
| -; CHECK-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds [[STRUCT_XYZT]], ptr [[B]], i64 [[INDVARS_IV]] |
206 |
| -; CHECK-NEXT: [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX2]], align 4 |
207 |
| -; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP25]], [[TMP24]] |
208 |
| -; CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds [[STRUCT_XYZT]], ptr [[DST]], i64 [[INDVARS_IV]] |
209 |
| -; CHECK-NEXT: store i32 [[ADD]], ptr [[ARRAYIDX5]], align 4 |
210 |
| -; CHECK-NEXT: [[Y:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX]], i64 4 |
211 |
| -; CHECK-NEXT: [[TMP26:%.*]] = load i32, ptr [[Y]], align 4 |
212 |
| -; CHECK-NEXT: [[Y11:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX2]], i64 4 |
213 |
| -; CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[Y11]], align 4 |
214 |
| -; CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP26]], [[TMP27]] |
215 |
| -; CHECK-NEXT: [[Y14:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX5]], i64 4 |
216 |
| -; CHECK-NEXT: store i32 [[SUB]], ptr [[Y14]], align 4 |
217 |
| -; CHECK-NEXT: [[Z:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX]], i64 8 |
218 |
| -; CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr [[Z]], align 4 |
219 |
| -; CHECK-NEXT: [[Z19:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX2]], i64 8 |
220 |
| -; CHECK-NEXT: [[TMP29:%.*]] = load i32, ptr [[Z19]], align 4 |
221 |
| -; CHECK-NEXT: [[SHL:%.*]] = shl i32 [[TMP28]], [[TMP29]] |
222 |
| -; CHECK-NEXT: [[Z22:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX5]], i64 8 |
223 |
| -; CHECK-NEXT: store i32 [[SHL]], ptr [[Z22]], align 4 |
224 |
| -; CHECK-NEXT: [[T:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX]], i64 12 |
225 |
| -; CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[T]], align 4 |
226 |
| -; CHECK-NEXT: [[T27:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX2]], i64 12 |
227 |
| -; CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[T27]], align 4 |
228 |
| -; CHECK-NEXT: [[SHR:%.*]] = ashr i32 [[TMP30]], [[TMP31]] |
229 |
| -; CHECK-NEXT: [[T30:%.*]] = getelementptr inbounds nuw i8, ptr [[ARRAYIDX5]], i64 12 |
230 |
| -; CHECK-NEXT: store i32 [[SHR]], ptr [[T30]], align 4 |
231 |
| -; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add nuw nsw i64 [[INDVARS_IV]], 1 |
232 |
| -; CHECK-NEXT: [[EXITCOND_NOT:%.*]] = icmp eq i64 [[INDVARS_IV_NEXT]], 1024 |
233 |
| -; CHECK-NEXT: br i1 [[EXITCOND_NOT]], label [[FOR_COND_CLEANUP]], label [[FOR_BODY]], !llvm.loop [[LOOP3:![0-9]+]] |
234 |
| -; CHECK: for.cond.cleanup: |
235 |
| -; CHECK-NEXT: ret void |
236 |
| -; |
237 |
| -entry: |
238 |
| - br label %for.body |
239 |
| - |
240 |
| -for.body: |
241 |
| - %indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ] |
242 |
| - %arrayidx = getelementptr inbounds %struct.xyzt, ptr %a, i64 %indvars.iv |
243 |
| - %0 = load i32, ptr %arrayidx, align 4 |
244 |
| - %arrayidx2 = getelementptr inbounds %struct.xyzt, ptr %b, i64 %indvars.iv |
245 |
| - %1 = load i32, ptr %arrayidx2, align 4 |
246 |
| - %add = add nsw i32 %1, %0 |
247 |
| - %arrayidx5 = getelementptr inbounds %struct.xyzt, ptr %dst, i64 %indvars.iv |
248 |
| - store i32 %add, ptr %arrayidx5, align 4 |
249 |
| - %y = getelementptr inbounds nuw i8, ptr %arrayidx, i64 4 |
250 |
| - %2 = load i32, ptr %y, align 4 |
251 |
| - %y11 = getelementptr inbounds nuw i8, ptr %arrayidx2, i64 4 |
252 |
| - %3 = load i32, ptr %y11, align 4 |
253 |
| - %sub = sub nsw i32 %2, %3 |
254 |
| - %y14 = getelementptr inbounds nuw i8, ptr %arrayidx5, i64 4 |
255 |
| - store i32 %sub, ptr %y14, align 4 |
256 |
| - %z = getelementptr inbounds nuw i8, ptr %arrayidx, i64 8 |
257 |
| - %4 = load i32, ptr %z, align 4 |
258 |
| - %z19 = getelementptr inbounds nuw i8, ptr %arrayidx2, i64 8 |
259 |
| - %5 = load i32, ptr %z19, align 4 |
260 |
| - %shl = shl i32 %4, %5 |
261 |
| - %z22 = getelementptr inbounds nuw i8, ptr %arrayidx5, i64 8 |
262 |
| - store i32 %shl, ptr %z22, align 4 |
263 |
| - %t = getelementptr inbounds nuw i8, ptr %arrayidx, i64 12 |
264 |
| - %6 = load i32, ptr %t, align 4 |
265 |
| - %t27 = getelementptr inbounds nuw i8, ptr %arrayidx2, i64 12 |
266 |
| - %7 = load i32, ptr %t27, align 4 |
267 |
| - %shr = ashr i32 %6, %7 |
268 |
| - %t30 = getelementptr inbounds nuw i8, ptr %arrayidx5, i64 12 |
269 |
| - store i32 %shr, ptr %t30, align 4 |
270 |
| - %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1 |
271 |
| - %exitcond.not = icmp eq i64 %indvars.iv.next, 1024 |
272 |
| - br i1 %exitcond.not, label %for.cond.cleanup, label %for.body |
273 |
| - |
274 |
| -for.cond.cleanup: |
275 |
| - ret void |
276 |
| -} |
0 commit comments