[LoongArch] Pre-commit tests for merge base offset. NFC

Author: heiher

llvm/test/CodeGen/LoongArch/inline-asm-constraint-m.ll

@@ -141,3 +141,49 @@ define i32 @m_offset_2048(ptr %p) nounwind {
   %2 = call i32 asm "ld.w $0, $1", "=r,*m"(ptr elementtype(i32) %1)
   ret i32 %2
 }
+
+@g_i32 = dso_local global i32 0
+
+define i32 @m_addr_pcrel() nounwind {
+; LA32-LABEL: m_addr_pcrel:
+; LA32:       # %bb.0:
+; LA32-NEXT:    pcalau12i $a0, %pc_hi20(g_i32)
+; LA32-NEXT:    addi.w $a1, $a0, %pc_lo12(g_i32)
+; LA32-NEXT:    #APP
+; LA32-NEXT:    ld.w $a0, $a1, 0
+; LA32-NEXT:    #NO_APP
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: m_addr_pcrel:
+; LA64:       # %bb.0:
+; LA64-NEXT:    pcalau12i $a0, %pc_hi20(g_i32)
+; LA64-NEXT:    addi.d $a1, $a0, %pc_lo12(g_i32)
+; LA64-NEXT:    #APP
+; LA64-NEXT:    ld.w $a0, $a1, 0
+; LA64-NEXT:    #NO_APP
+; LA64-NEXT:    ret
+  %1 = tail call i32 asm sideeffect "ld.w $0, $1", "=&r,*m"(ptr nonnull elementtype(i32) @g_i32)
+  ret i32 %1
+}
+
+define i32 @m_addr_should_not_fold() nounwind {
+; LA32-LABEL: m_addr_should_not_fold:
+; LA32:       # %bb.0:
+; LA32-NEXT:    pcalau12i $a0, %pc_hi20(g_i32)
+; LA32-NEXT:    addi.w $a1, $a0, %pc_lo12(g_i32)
+; LA32-NEXT:    #APP
+; LA32-NEXT:    ld.w $a0, $a1, 0
+; LA32-NEXT:    #NO_APP
+; LA32-NEXT:    ret
+;
+; LA64-LABEL: m_addr_should_not_fold:
+; LA64:       # %bb.0:
+; LA64-NEXT:    pcalau12i $a0, %pc_hi20(g_i32)
+; LA64-NEXT:    addi.d $a1, $a0, %pc_lo12(g_i32)
+; LA64-NEXT:    #APP
+; LA64-NEXT:    ld.w $a0, $a1, 0
+; LA64-NEXT:    #NO_APP
+; LA64-NEXT:    ret
+  %1 = tail call i32 asm sideeffect "ld.w $0, $1, 0", "=&r,r,~{memory}"(ptr nonnull @g_i32)
+  ret i32 %1
+}