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1 parent df2dca7 commit 84e3c6fCopy full SHA for 84e3c6f
llvm/lib/Target/RISCV/RISCVVMV0Elimination.cpp
@@ -88,12 +88,12 @@ bool RISCVVMV0Elimination::runOnMachineFunction(MachineFunction &MF) {
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return false;
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MachineRegisterInfo &MRI = MF.getRegInfo();
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- const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
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const TargetInstrInfo *TII = ST->getInstrInfo();
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#ifndef NDEBUG
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// Assert that we won't clobber any existing reads of v0 where we need to
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// insert copies.
+ const TargetRegisterInfo *TRI = MRI.getTargetRegisterInfo();
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ReversePostOrderTraversal<MachineBasicBlock *> RPOT(&*MF.begin());
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for (MachineBasicBlock *MBB : RPOT) {
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bool V0Clobbered = false;
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