Skip to content

Commit 84f06b8

Browse files
committed
MCAsmBackend: Add member variable MCAssembler * and define getContext
A lot of member functions have the MCAssembler * argument just to call getContext. Let's cache the MCAssembler pointer.
1 parent c8f29e3 commit 84f06b8

File tree

16 files changed

+41
-30
lines changed

16 files changed

+41
-30
lines changed

llvm/include/llvm/MC/MCAsmBackend.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -43,13 +43,19 @@ class MCAsmBackend {
4343
protected: // Can only create subclasses.
4444
MCAsmBackend(llvm::endianness Endian, bool LinkerRelaxation = false);
4545

46+
MCAssembler *Asm = nullptr;
47+
4648
public:
4749
MCAsmBackend(const MCAsmBackend &) = delete;
4850
MCAsmBackend &operator=(const MCAsmBackend &) = delete;
4951
virtual ~MCAsmBackend();
5052

5153
const llvm::endianness Endian;
5254

55+
void setAssembler(MCAssembler *A) { Asm = A; }
56+
57+
MCContext &getContext() const;
58+
5359
/// True for RISC-V and LoongArch. Relaxable relocations are marked with a
5460
/// RELAX relocation.
5561
bool allowLinkerRelaxation() const { return LinkerRelaxation; }

llvm/lib/MC/MCAsmBackend.cpp

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,8 @@ MCAsmBackend::MCAsmBackend(llvm::endianness Endian, bool LinkerRelaxation)
2929

3030
MCAsmBackend::~MCAsmBackend() = default;
3131

32+
MCContext &MCAsmBackend::getContext() const { return Asm->getContext(); }
33+
3234
std::unique_ptr<MCObjectWriter>
3335
MCAsmBackend::createObjectWriter(raw_pwrite_stream &OS) const {
3436
auto TW = createObjectTargetWriter();

llvm/lib/MC/MCAssembler.cpp

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -82,7 +82,10 @@ MCAssembler::MCAssembler(MCContext &Context,
8282
std::unique_ptr<MCCodeEmitter> Emitter,
8383
std::unique_ptr<MCObjectWriter> Writer)
8484
: Context(Context), Backend(std::move(Backend)),
85-
Emitter(std::move(Emitter)), Writer(std::move(Writer)) {}
85+
Emitter(std::move(Emitter)), Writer(std::move(Writer)) {
86+
if (this->Backend)
87+
this->Backend->setAssembler(this);
88+
}
8689

8790
void MCAssembler::reset() {
8891
RelaxAll = false;

llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -431,8 +431,8 @@ void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
431431
SymLoc == AArch64AuthMCExpr::VK_AUTHADDR) {
432432
const auto *Expr = dyn_cast<AArch64AuthMCExpr>(Fixup.getValue());
433433
if (!Expr) {
434-
Asm.getContext().reportError(Fixup.getValue()->getLoc(),
435-
"expected relocatable expression");
434+
getContext().reportError(Fixup.getValue()->getLoc(),
435+
"expected relocatable expression");
436436
return;
437437
}
438438
assert(Value == 0);
@@ -446,7 +446,7 @@ void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
446446
return; // Doesn't change encoding.
447447
unsigned NumBytes = getFixupKindNumBytes(Kind);
448448
MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
449-
MCContext &Ctx = Asm.getContext();
449+
MCContext &Ctx = getContext();
450450
int64_t SignedValue = static_cast<int64_t>(Value);
451451
// Apply any target-specific value adjustments.
452452
Value = adjustFixupValue(Fixup, Target, Value, Ctx, TheTriple, IsResolved);

llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUAsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -141,7 +141,7 @@ void AMDGPUAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
141141
if (mc::isRelocation(Fixup.getKind()))
142142
return;
143143

144-
Value = adjustFixupValue(Fixup, Value, &Asm.getContext());
144+
Value = adjustFixupValue(Fixup, Value, &getContext());
145145
if (!Value)
146146
return; // Doesn't change encoding.
147147

llvm/lib/Target/ARM/MCTargetDesc/ARMAsmBackend.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -475,7 +475,7 @@ unsigned ARMAsmBackend::adjustFixupValue(const MCAssembler &Asm,
475475
// Other relocation types don't want this bit though (branches couldn't encode
476476
// it if it *was* present, and no other relocations exist) and it can
477477
// interfere with checking valid expressions.
478-
bool IsMachO = Asm.getContext().getObjectFileType() == MCContext::IsMachO;
478+
bool IsMachO = getContext().getObjectFileType() == MCContext::IsMachO;
479479
if (const auto *SA = Target.getAddSym()) {
480480
if (IsMachO && Asm.isThumbFunc(SA) && SA->isExternal() &&
481481
(Kind == FK_Data_4 || Kind == ARM::fixup_arm_movw_lo16 ||
@@ -1135,7 +1135,7 @@ void ARMAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
11351135
auto Kind = Fixup.getKind();
11361136
if (mc::isRelocation(Kind))
11371137
return;
1138-
MCContext &Ctx = Asm.getContext();
1138+
MCContext &Ctx = getContext();
11391139
Value = adjustFixupValue(Asm, Fixup, Target, Value, IsResolved, Ctx, STI);
11401140
if (!Value)
11411141
return; // Doesn't change encoding.

llvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -391,7 +391,7 @@ void AVRAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
391391
const MCSubtargetInfo *STI) const {
392392
if (mc::isRelocation(Fixup.getKind()))
393393
return;
394-
adjustFixupValue(Fixup, Target, Value, &Asm.getContext());
394+
adjustFixupValue(Fixup, Target, Value, &getContext());
395395
if (Value == 0)
396396
return; // Doesn't change encoding.
397397

@@ -532,7 +532,7 @@ bool AVRAsmBackend::forceRelocation(const MCAssembler &Asm, const MCFragment &F,
532532
// hopes are that the module we're currently compiling won't be actually
533533
// linked to the final binary.
534534
return !adjust::adjustRelativeBranch(Size, Fixup, Offset,
535-
Asm.getContext().getSubtargetInfo());
535+
getContext().getSubtargetInfo());
536536
}
537537

538538
case AVR::fixup_call:

llvm/lib/Target/CSKY/MCTargetDesc/CSKYAsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -197,7 +197,7 @@ void CSKYAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
197197
MCFixupKind Kind = Fixup.getKind();
198198
if (mc::isRelocation(Kind))
199199
return;
200-
MCContext &Ctx = Asm.getContext();
200+
MCContext &Ctx = getContext();
201201
MCFixupKindInfo Info = getFixupKindInfo(Kind);
202202
if (!Value)
203203
return; // Doesn't change encoding.

llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -594,7 +594,7 @@ class HexagonAsmBackend : public MCAsmBackend {
594594
if (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_SIZE) {
595595
++relaxedCnt;
596596
*RelaxTarget = &MCI;
597-
setExtender(Asm.getContext());
597+
setExtender(getContext());
598598
return true;
599599
} else {
600600
return false;
@@ -632,7 +632,7 @@ class HexagonAsmBackend : public MCAsmBackend {
632632
if (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_SIZE) {
633633
++relaxedCnt;
634634
*RelaxTarget = &MCI;
635-
setExtender(Asm.getContext());
635+
setExtender(getContext());
636636
return true;
637637
}
638638
}
@@ -722,7 +722,7 @@ class HexagonAsmBackend : public MCAsmBackend {
722722
break;
723723
}
724724
case MCFragment::FT_Relaxable: {
725-
MCContext &Context = Asm.getContext();
725+
MCContext &Context = getContext();
726726
auto &RF = cast<MCRelaxableFragment>(*Frags[K]);
727727
auto &Inst = const_cast<MCInst &>(RF.getInst());
728728

llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchAsmBackend.cpp

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -153,7 +153,7 @@ void LoongArchAsmBackend::applyFixup(const MCAssembler &Asm,
153153
if (mc::isRelocation(Kind))
154154
return;
155155
MCFixupKindInfo Info = getFixupKindInfo(Kind);
156-
MCContext &Ctx = Asm.getContext();
156+
MCContext &Ctx = getContext();
157157

158158
// Fixup leb128 separately.
159159
if (Fixup.getTargetKind() == FK_Data_leb128)
@@ -216,7 +216,7 @@ bool LoongArchAsmBackend::shouldInsertFixupForCodeAlign(MCAssembler &Asm,
216216
return false;
217217

218218
MCSection *Sec = AF.getParent();
219-
MCContext &Ctx = Asm.getContext();
219+
MCContext &Ctx = getContext();
220220
const MCExpr *Dummy = MCConstantExpr::create(0, Ctx);
221221
MCFixup Fixup = MCFixup::create(0, Dummy, ELF::R_LARCH_ALIGN);
222222
unsigned MaxBytesToEmit = AF.getMaxBytesToEmit();
@@ -299,7 +299,7 @@ std::pair<bool, bool> LoongArchAsmBackend::relaxLEB128(const MCAssembler &Asm,
299299
bool LoongArchAsmBackend::relaxDwarfLineAddr(const MCAssembler &Asm,
300300
MCDwarfLineAddrFragment &DF,
301301
bool &WasRelaxed) const {
302-
MCContext &C = Asm.getContext();
302+
MCContext &C = getContext();
303303

304304
int64_t LineDelta = DF.getLineDelta();
305305
const MCExpr &AddrDelta = DF.getAddrDelta();
@@ -383,7 +383,7 @@ bool LoongArchAsmBackend::relaxDwarfCFA(const MCAssembler &Asm,
383383
Fixups.clear();
384384
raw_svector_ostream OS(Data);
385385

386-
assert(Asm.getContext().getAsmInfo()->getMinInstAlignment() == 1 &&
386+
assert(getContext().getAsmInfo()->getMinInstAlignment() == 1 &&
387387
"expected 1-byte alignment");
388388
if (Value == 0) {
389389
WasRelaxed = OldSize != Data.size();

llvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -109,7 +109,7 @@ void MSP430AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
109109
MutableArrayRef<char> Data,
110110
uint64_t Value, bool IsResolved,
111111
const MCSubtargetInfo *STI) const {
112-
Value = adjustFixupValue(Fixup, Value, Asm.getContext());
112+
Value = adjustFixupValue(Fixup, Value, getContext());
113113
MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
114114
if (!Value)
115115
return; // Doesn't change encoding.

llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -248,7 +248,7 @@ void MipsAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
248248
bool IsResolved,
249249
const MCSubtargetInfo *STI) const {
250250
MCFixupKind Kind = Fixup.getKind();
251-
MCContext &Ctx = Asm.getContext();
251+
MCContext &Ctx = getContext();
252252
Value = adjustFixupValue(Fixup, Value, Ctx);
253253

254254
if (!Value)

llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -238,7 +238,7 @@ void RISCVAsmBackend::relaxInstruction(MCInst &Inst,
238238
bool RISCVAsmBackend::relaxDwarfLineAddr(const MCAssembler &Asm,
239239
MCDwarfLineAddrFragment &DF,
240240
bool &WasRelaxed) const {
241-
MCContext &C = Asm.getContext();
241+
MCContext &C = getContext();
242242

243243
int64_t LineDelta = DF.getLineDelta();
244244
const MCExpr &AddrDelta = DF.getAddrDelta();
@@ -320,7 +320,7 @@ bool RISCVAsmBackend::relaxDwarfCFA(const MCAssembler &Asm,
320320
Fixups.clear();
321321
raw_svector_ostream OS(Data);
322322

323-
assert(Asm.getContext().getAsmInfo()->getMinInstAlignment() == 1 &&
323+
assert(getContext().getAsmInfo()->getMinInstAlignment() == 1 &&
324324
"expected 1-byte alignment");
325325
if (Value == 0) {
326326
WasRelaxed = OldSize != Data.size();
@@ -561,7 +561,7 @@ bool RISCVAsmBackend::isPCRelFixupResolved(const MCAssembler &Asm,
561561
// offset-affected MCAlignFragment). Complements the generic
562562
// isSymbolRefDifferenceFullyResolvedImpl.
563563
if (!PCRelTemp)
564-
PCRelTemp = Asm.getContext().createTempSymbol();
564+
PCRelTemp = getContext().createTempSymbol();
565565
PCRelTemp->setFragment(const_cast<MCFragment *>(&F));
566566
MCValue Res;
567567
MCExpr::evaluateSymbolicAdd(&Asm, false, MCValue::get(SymA),
@@ -584,8 +584,8 @@ bool RISCVAsmBackend::evaluateTargetFixup(const MCAssembler &Asm,
584584
case RISCV::fixup_riscv_pcrel_lo12_s: {
585585
AUIPCFixup = cast<RISCVMCExpr>(Fixup.getValue())->getPCRelHiFixup(&AUIPCDF);
586586
if (!AUIPCFixup) {
587-
Asm.getContext().reportError(Fixup.getLoc(),
588-
"could not find corresponding %pcrel_hi");
587+
getContext().reportError(Fixup.getLoc(),
588+
"could not find corresponding %pcrel_hi");
589589
return true;
590590
}
591591

@@ -687,7 +687,7 @@ void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
687687
MCFixupKind Kind = Fixup.getKind();
688688
if (mc::isRelocation(Kind))
689689
return;
690-
MCContext &Ctx = Asm.getContext();
690+
MCContext &Ctx = getContext();
691691
MCFixupKindInfo Info = getFixupKindInfo(Kind);
692692
if (!Value)
693693
return; // Doesn't change encoding.
@@ -750,7 +750,7 @@ bool RISCVAsmBackend::shouldInsertFixupForCodeAlign(MCAssembler &Asm,
750750
if (!shouldInsertExtraNopBytesForCodeAlign(AF, Count) || (Count == 0))
751751
return false;
752752

753-
MCContext &Ctx = Asm.getContext();
753+
MCContext &Ctx = getContext();
754754
const MCExpr *Dummy = MCConstantExpr::create(0, Ctx);
755755
// Create fixup_riscv_align fixup.
756756
MCFixup Fixup = MCFixup::create(0, Dummy, ELF::R_RISCV_ALIGN, SMLoc());

llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -177,7 +177,7 @@ void SystemZMCAsmBackend::applyFixup(const MCAssembler &Asm,
177177
assert(Offset + Size <= Data.size() && "Invalid fixup offset!");
178178

179179
// Big-endian insertion of Size bytes.
180-
Value = extractBitsForFixup(Kind, Value, Fixup, Asm.getContext());
180+
Value = extractBitsForFixup(Kind, Value, Fixup, getContext());
181181
if (BitSize < 64)
182182
Value &= ((uint64_t)1 << BitSize) - 1;
183183
unsigned ShiftValue = (Size * 8) - 8;

llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -713,8 +713,8 @@ void X86AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
713713
getFixupKindInfo(Fixup.getKind()).Flags & MCFixupKindInfo::FKF_IsPCRel) {
714714
// check that PC relative fixup fits into the fixup size.
715715
if (Size > 0 && !isIntN(Size * 8, SignedValue))
716-
Asm.getContext().reportError(
717-
Fixup.getLoc(), "value of " + Twine(SignedValue) +
716+
getContext().reportError(Fixup.getLoc(),
717+
"value of " + Twine(SignedValue) +
718718
" is too large for field of " + Twine(Size) +
719719
((Size == 1) ? " byte." : " bytes."));
720720
} else {

llvm/lib/Target/Xtensa/MCTargetDesc/XtensaAsmBackend.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -149,7 +149,7 @@ void XtensaAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
149149
MutableArrayRef<char> Data, uint64_t Value,
150150
bool IsResolved,
151151
const MCSubtargetInfo *STI) const {
152-
MCContext &Ctx = Asm.getContext();
152+
MCContext &Ctx = getContext();
153153
MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind());
154154

155155
Value = adjustFixupValue(Fixup, Value, Ctx);

0 commit comments

Comments
 (0)