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alexey-bataevalexey-bataev
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[SLP]Fix number of operands for the split node
FOr the split node number of operands should be requested via getNumOperands() function, even if the main op is CallInst.
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‎llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp

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@@ -7577,6 +7577,8 @@ void BoUpSLP::reorderBottomToTop(bool IgnoreReorder) {
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return Res.takeVector();
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};
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auto GetNumOperands = [](const TreeEntry *TE) {
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if (TE->State == TreeEntry::SplitVectorize)
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return TE->getNumOperands();
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if (auto *CI = dyn_cast<CallInst>(TE->getMainOp()); CI)
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return CI->arg_size();
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return TE->getNumOperands();

‎llvm/test/Transforms/SLPVectorizer/X86/split-node-num-operands.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
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; RUN: opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -mattr=+avx -slp-threshold=-1000 < %s | FileCheck %s
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define i64 @Foo(ptr align 8 dereferenceable(344) %0, i64 %1) {
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; CHECK-LABEL: define i64 @Foo(
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; CHECK-SAME: ptr align 8 dereferenceable(344) [[TMP0:%.*]], i64 [[TMP1:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP0]], i64 104
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; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[TMP0]], i64 112
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; CHECK-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[TMP0]], i64 24
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; CHECK-NEXT: [[TMP6:%.*]] = load i64, ptr [[TMP3]], align 8
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; CHECK-NEXT: [[TMP7:%.*]] = load i64, ptr [[TMP4]], align 8
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; CHECK-NEXT: [[TMP8:%.*]] = load i64, ptr [[TMP5]], align 8
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; CHECK-NEXT: [[TMP9:%.*]] = load i64, ptr [[TMP0]], align 8
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; CHECK-NEXT: [[TMP10:%.*]] = insertelement <2 x i64> poison, i64 [[TMP6]], i32 0
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; CHECK-NEXT: [[TMP11:%.*]] = insertelement <2 x i64> [[TMP10]], i64 [[TMP9]], i32 1
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; CHECK-NEXT: [[TMP12:%.*]] = insertelement <2 x i64> poison, i64 [[TMP7]], i32 0
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; CHECK-NEXT: [[TMP13:%.*]] = insertelement <2 x i64> [[TMP12]], i64 [[TMP8]], i32 1
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; CHECK-NEXT: [[TMP14:%.*]] = insertelement <2 x i64> poison, i64 0, i32 0
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; CHECK-NEXT: [[TMP15:%.*]] = insertelement <2 x i64> <i64 0, i64 poison>, i64 [[TMP1]], i32 1
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; CHECK-NEXT: br label %[[BB16:.*]]
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; CHECK: [[BB16]]:
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; CHECK-NEXT: [[TMP17:%.*]] = phi <2 x i64> [ [[TMP11]], [[TMP2:%.*]] ], [ zeroinitializer, %[[TMP25:.*]] ]
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; CHECK-NEXT: [[TMP18:%.*]] = phi <2 x i64> [ [[TMP13]], [[TMP2]] ], [ [[TMP29:%.*]], %[[TMP25]] ]
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; CHECK-NEXT: switch i32 0, label %[[BB19:.*]] [
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; CHECK-NEXT: i32 0, label %[[TMP25]]
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; CHECK-NEXT: ]
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; CHECK: [[BB19]]:
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; CHECK-NEXT: [[TMP20:%.*]] = shufflevector <2 x i64> [[TMP18]], <2 x i64> poison, <4 x i32> <i32 1, i32 poison, i32 poison, i32 poison>
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; CHECK-NEXT: [[TMP21:%.*]] = insertelement <4 x i64> [[TMP20]], i64 0, i32 1
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; CHECK-NEXT: [[TMP22:%.*]] = insertelement <4 x i64> [[TMP21]], i64 0, i32 2
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; CHECK-NEXT: [[TMP23:%.*]] = shufflevector <4 x i64> [[TMP22]], <4 x i64> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
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; CHECK-NEXT: [[TMP24:%.*]] = shufflevector <2 x i64> [[TMP14]], <2 x i64> [[TMP18]], <2 x i32> <i32 0, i32 2>
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; CHECK-NEXT: br label %[[TMP25]]
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; CHECK: [[TMP25]]:
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; CHECK-NEXT: [[TMP26:%.*]] = phi <2 x i64> [ [[TMP17]], %[[BB19]] ], [ zeroinitializer, %[[BB16]] ]
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; CHECK-NEXT: [[TMP27:%.*]] = phi <4 x i64> [ [[TMP23]], %[[BB19]] ], [ zeroinitializer, %[[BB16]] ]
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; CHECK-NEXT: [[TMP28:%.*]] = phi <2 x i64> [ [[TMP24]], %[[BB19]] ], [ [[TMP15]], %[[BB16]] ]
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; CHECK-NEXT: [[TMP29]] = shufflevector <2 x i64> [[TMP18]], <2 x i64> <i64 0, i64 poison>, <2 x i32> <i32 2, i32 1>
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; CHECK-NEXT: br i1 false, label %[[DOTLOOPEXIT206:.*]], label %[[BB16]]
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; CHECK: [[_LOOPEXIT206:.*:]]
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; CHECK-NEXT: switch i32 0, label %[[BB32:.*]] [
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; CHECK-NEXT: i32 0, [[DOTCONT174:label %.*]]
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; CHECK-NEXT: i32 1, label %[[BB30:.*]]
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; CHECK-NEXT: ]
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; CHECK: [[BB30]]:
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; CHECK-NEXT: [[TMP31:%.*]] = shufflevector <4 x i64> [[TMP27]], <4 x i64> <i64 0, i64 0, i64 poison, i64 0>, <4 x i32> <i32 4, i32 5, i32 2, i32 7>
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; CHECK-NEXT: br [[DOTCONT174]]
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; CHECK: [[BB32]]:
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; CHECK-NEXT: [[TMP33:%.*]] = insertelement <4 x i64> [[TMP27]], i64 0, i32 1
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; CHECK-NEXT: [[TMP34:%.*]] = insertelement <4 x i64> [[TMP33]], i64 0, i32 2
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; CHECK-NEXT: [[TMP35:%.*]] = shufflevector <4 x i64> [[TMP34]], <4 x i64> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 2>
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; CHECK-NEXT: [[TMP36:%.*]] = insertelement <2 x i64> [[TMP28]], i64 0, i32 0
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; CHECK-NEXT: br [[DOTCONT174]]
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; CHECK: [[_CONT174:.*:]]
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; CHECK-NEXT: [[TMP37:%.*]] = phi <2 x i64> [ [[TMP26]], %[[BB32]] ], [ zeroinitializer, %[[BB30]] ], [ [[TMP26]], %[[DOTLOOPEXIT206]] ]
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; CHECK-NEXT: [[TMP38:%.*]] = phi <4 x i64> [ [[TMP35]], %[[BB32]] ], [ [[TMP31]], %[[BB30]] ], [ [[TMP27]], %[[DOTLOOPEXIT206]] ]
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; CHECK-NEXT: [[TMP39:%.*]] = phi <2 x i64> [ [[TMP36]], %[[BB32]] ], [ zeroinitializer, %[[BB30]] ], [ [[TMP28]], %[[DOTLOOPEXIT206]] ]
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; CHECK-NEXT: ret i64 0
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;
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%3 = getelementptr i8, ptr %0, i64 104
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%4 = getelementptr i8, ptr %0, i64 112
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%5 = getelementptr i8, ptr %0, i64 24
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%6 = load i64, ptr %3, align 8
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%7 = load i64, ptr %4, align 8
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%8 = load i64, ptr %5, align 8
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%9 = load i64, ptr %0, align 8
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br label %10
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10:
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%11 = phi i64 [ %9, %2 ], [ 0, %18 ]
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%12 = phi i64 [ %8, %2 ], [ %12, %18 ]
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%13 = phi i64 [ %7, %2 ], [ 0, %18 ]
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%14 = phi i64 [ %6, %2 ], [ 0, %18 ]
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switch i32 0, label %15 [
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i32 0, label %18
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]
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15:
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%16 = tail call i64 @llvm.umin.i64(i64 0, i64 0)
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%17 = tail call i64 @llvm.umax.i64(i64 0, i64 0)
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br label %18
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18:
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%19 = phi i64 [ %17, %15 ], [ 0, %10 ]
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%20 = phi i64 [ %16, %15 ], [ 0, %10 ]
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%21 = phi i64 [ %11, %15 ], [ 0, %10 ]
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%22 = phi i64 [ %12, %15 ], [ 0, %10 ]
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%23 = phi i64 [ %13, %15 ], [ %1, %10 ]
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%24 = phi i64 [ %14, %15 ], [ 0, %10 ]
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br i1 false, label %.loopexit206, label %10
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.loopexit206:
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switch i32 0, label %26 [
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i32 0, label %.cont174
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i32 1, label %25
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]
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br label %.cont174
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%27 = tail call i64 @llvm.umin.i64(i64 0, i64 0)
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%28 = tail call i64 @llvm.umax.i64(i64 0, i64 0)
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br label %.cont174
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.cont174:
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%.sroa.139.1 = phi i64 [ %28, %26 ], [ %19, %25 ], [ %19, %.loopexit206 ]
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%.sroa.133.1 = phi i64 [ %27, %26 ], [ 0, %25 ], [ %20, %.loopexit206 ]
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%.sroa.81.1 = phi i64 [ %23, %26 ], [ 0, %25 ], [ %23, %.loopexit206 ]
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%.sroa.75.1 = phi i64 [ %24, %26 ], [ 0, %25 ], [ %24, %.loopexit206 ]
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%.sroa.21.1 = phi i64 [ %21, %26 ], [ 0, %25 ], [ %21, %.loopexit206 ]
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%.sroa.15.1 = phi i64 [ %22, %26 ], [ 0, %25 ], [ %22, %.loopexit206 ]
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%29 = phi i64 [ %28, %26 ], [ 0, %25 ], [ %19, %.loopexit206 ]
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%30 = phi i64 [ %27, %26 ], [ 0, %25 ], [ %20, %.loopexit206 ]
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ret i64 0
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}
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declare i64 @llvm.umax.i64(i64, i64)
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declare i64 @llvm.umin.i64(i64, i64)
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