@@ -4047,16 +4047,16 @@ SDValue AMDGPUTargetLowering::performShlCombine(SDNode *N,
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SelectionDAG &DAG = DCI.DAG ;
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if (!CRHS) {
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- // shl i64 X, Y -> [0, shl i32 X, (Y - 32 )]
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+ // shl i64 X, Y -> [0, shl i32 X, (Y & 0x1F )]
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if (VT == MVT::i64 ) {
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KnownBits Known = DAG.computeKnownBits (RHS);
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if (Known.getMinValue ().getZExtValue () >= 32 ) {
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SDValue truncShiftAmt = DAG.getNode (ISD::TRUNCATE, SL, MVT::i32 , RHS);
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- const SDValue C32 = DAG.getConstant (32 , SL, MVT::i32 );
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- SDValue ShiftAmt =
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- DAG.getNode (ISD::SUB , SL, MVT::i32 , truncShiftAmt, C32 );
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+ const SDValue C31 = DAG.getConstant (31 , SL, MVT::i32 );
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+ SDValue MaskedShiftAmt =
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+ DAG.getNode (ISD::AND , SL, MVT::i32 , truncShiftAmt, C31 );
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SDValue Lo = DAG.getNode (ISD::TRUNCATE, SL, MVT::i32 , LHS);
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- SDValue NewShift = DAG.getNode (ISD::SHL, SL, MVT::i32 , Lo, ShiftAmt );
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+ SDValue NewShift = DAG.getNode (ISD::SHL, SL, MVT::i32 , Lo, MaskedShiftAmt );
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const SDValue Zero = DAG.getConstant (0 , SL, MVT::i32 );
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SDValue Vec = DAG.getBuildVector (MVT::v2i32, SL, {Zero, NewShift});
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return DAG.getNode (ISD::BITCAST, SL, MVT::i64 , Vec);
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