MachineVerifier: Add tests which are incorrectly accepted

In the process of splitting out the liveness tracking, I ran into
these cases which should have been caught. There are still missing
errors for some cases in the entry block.

https://reviews.llvm.org/D127104

Author: arsenm

llvm/test/MachineVerifier/register-killed-inside-loop.mir

@@ -0,0 +1,33 @@
+# FIXME: This should fail the verifier
+# XFAIL: *
+# REQUIRES: amdgpu-registered-target
+# RUN: not --crash llc -o - -mtriple=amdgcn-amd-amdhsa -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+
+# %1 is live out of %bb.1 through the loop edge, and therefore the kill flag is invalid.
+
+# CHECK: *** Bad machine code: Virtual register killed in block, but needed live out. ***
+
+---
+name:            kill_flag_in_loop
+body:             |
+  bb.0:
+    liveins: $sgpr0, $vgpr0_vgpr1
+    successors: %bb.1(0x80000000)
+
+    %0:sreg_32 = COPY $sgpr0
+    %1:sreg_32 = S_AND_B32 1, killed %0, implicit-def dead $scc
+
+  bb.1:
+    successors: %bb.2(0x40000000), %bb.1(0x40000000)
+
+    S_CMP_EQ_I32 killed %1:sreg_32, 1, implicit-def $scc
+    S_CBRANCH_SCC0 %bb.2, implicit $scc
+    S_BRANCH %bb.1
+
+  bb.2:
+    successors: %bb.3(0x80000000)
+
+  bb.3:
+    S_ENDPGM 0
+
+...

llvm/test/MachineVerifier/undef-virt-reg-entry-block.mir

@@ -0,0 +1,14 @@
+# XFAIL: *
+# REQUIRES: amdgpu-registered-target
+# RUN: not --crash llc -o - -mtriple=amdgcn-amd-amdhsa -run-pass=none -verify-machineinstrs %s
+
+ # FIXME: This should catch the undefined use of %0
+
+---
+name:            undef_virtreg
+body:             |
+  bb.0:
+
+    S_ENDPGM 0, implicit %0:sreg_32
+
+...

llvm/test/MachineVerifier/undef-virt-reg-nonentry-block.mir

@@ -0,0 +1,17 @@
+# FIXME: This should fail the verifier
+# XFAIL: *
+# REQUIRES: amdgpu-registered-target
+# RUN: not --crash llc -o - -mtriple=amdgcn-amd-amdhsa -run-pass=none -verify-machineinstrs %s 2>&1 | FileCheck %s
+
+# CHECK: *** Bad machine code: Virtual register defs don't dominate all uses. ***
+
+---
+name:            undef_virtreg
+body:             |
+  bb.0:
+
+  bb.1:
+    %0:sreg_32 = S_AND_B32 1, %1:sreg_32, implicit-def dead $scc
+    S_ENDPGM 0, implicit %1
+
+...