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[ARM] Switch to LiveRegUnits to fix r7 register allocation bug
This fixes a register allocation bug, because while r7 was marked as allowed to be used, LivePhysRegs always reported it as unavailable because it is reserved, despite this being an exception to the rule.
1 parent 2a3f27c commit 8759051

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2 files changed

+9
-11
lines changed

2 files changed

+9
-11
lines changed

llvm/lib/Target/ARM/Thumb1FrameLowering.cpp

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -612,11 +612,11 @@ bool Thumb1FrameLowering::needPopSpecialFixUp(const MachineFunction &MF) const {
612612

613613
static void findTemporariesForLR(const BitVector &GPRsNoLRSP,
614614
const BitVector &PopFriendly,
615-
const LivePhysRegs &UsedRegs, unsigned &PopReg,
615+
const LiveRegUnits &UsedRegs, unsigned &PopReg,
616616
unsigned &TmpReg, MachineRegisterInfo &MRI) {
617617
PopReg = TmpReg = 0;
618618
for (auto Reg : GPRsNoLRSP.set_bits()) {
619-
if (UsedRegs.available(MRI, Reg)) {
619+
if (UsedRegs.available(Reg)) {
620620
// Remember the first pop-friendly register and exit.
621621
if (PopFriendly.test(Reg)) {
622622
PopReg = Reg;
@@ -684,7 +684,7 @@ bool Thumb1FrameLowering::emitPopSpecialFixUp(MachineBasicBlock &MBB,
684684
// Look for a temporary register to use.
685685
// First, compute the liveness information.
686686
const TargetRegisterInfo &TRI = *STI.getRegisterInfo();
687-
LivePhysRegs UsedRegs(TRI);
687+
LiveRegUnits UsedRegs(TRI);
688688
UsedRegs.addLiveOuts(MBB);
689689
// The semantic of pristines changed recently and now,
690690
// the callee-saved registers that are touched in the function

llvm/test/CodeGen/Thumb/PR35481.ll

Lines changed: 6 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -18,11 +18,10 @@ define <4 x i32> @f() local_unnamed_addr #0 {
1818
; CHECK-V4T-NEXT: movs r2, #3
1919
; CHECK-V4T-NEXT: movs r3, #4
2020
; CHECK-V4T-NEXT: bl g
21+
; CHECK-V4T-NEXT: ldr r7, [sp, #4]
22+
; CHECK-V4T-NEXT: mov lr, r7
2123
; CHECK-V4T-NEXT: pop {r7}
22-
; CHECK-V4T-NEXT: mov r12, r0
23-
; CHECK-V4T-NEXT: pop {r0}
24-
; CHECK-V4T-NEXT: mov lr, r0
25-
; CHECK-V4T-NEXT: mov r0, r12
24+
; CHECK-V4T-NEXT: add sp, #4
2625
; CHECK-V4T-NEXT: bx lr
2726
;
2827
; CHECK-V8M-LABEL: f:
@@ -36,11 +35,10 @@ define <4 x i32> @f() local_unnamed_addr #0 {
3635
; CHECK-V8M-NEXT: movs r1, #2
3736
; CHECK-V8M-NEXT: movs r2, #3
3837
; CHECK-V8M-NEXT: movs r3, #4
38+
; CHECK-V8M-NEXT: ldr r7, [sp, #4]
39+
; CHECK-V8M-NEXT: mov lr, r7
3940
; CHECK-V8M-NEXT: pop {r7}
40-
; CHECK-V8M-NEXT: mov r12, r0
41-
; CHECK-V8M-NEXT: pop {r0}
42-
; CHECK-V8M-NEXT: mov lr, r0
43-
; CHECK-V8M-NEXT: mov r0, r12
41+
; CHECK-V8M-NEXT: add sp, #4
4442
; CHECK-V8M-NEXT: b g
4543
entry:
4644
%call = tail call i32 @h(i32 1)

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