@@ -240,15 +240,15 @@ Changes to the RISC-V Backend
240
240
Changes to the WebAssembly Backend
241
241
----------------------------------
242
242
243
- The default target CPU, "generic", now enables the ` -mnontrapping-fptoint `
244
- and ` -mbulk-memory ` flags, which correspond to the [ Bulk Memory Operations]
245
- and [ Non-trapping float-to-int Conversions] language features, which are
246
- [ widely implemented in engines] .
247
-
248
- A new Lime1 target CPU is added, -mcpu=lime1. This CPU follows the definition of
249
- the Lime1 CPU [ here] , and enables -mmultivalue, -mmutable-globals ,
250
- -mcall-indirect-overlong, -msign-ext, -mbulk-memory-opt, -mnontrapping-fptoint ,
251
- and -mextended-const.
243
+ * The default target CPU, "generic", now enables the ` -mnontrapping-fptoint `
244
+ and ` -mbulk-memory ` flags, which correspond to the [ Bulk Memory Operations]
245
+ and [ Non-trapping float-to-int Conversions] language features, which are
246
+ [ widely implemented in engines] .
247
+
248
+ * A new Lime1 target CPU is added, ` -mcpu=lime1 ` . This CPU follows the
249
+ definition of the Lime1 CPU [ here] , and enables ` -mmultivalue ` ,
250
+ ` -mmutable-globals ` , ` -mcall-indirect-overlong ` , ` -msign-ext ` ,
251
+ ` -mbulk-memory-opt ` , ` -mnontrapping-fptoint ` , and ` -mextended-const ` .
252
252
253
253
[ Bulk Memory Operations ] : https://github.com/WebAssembly/bulk-memory-operations/blob/master/proposals/bulk-memory-operations/Overview.md
254
254
[ Non-trapping float-to-int Conversions ] : https://github.com/WebAssembly/spec/blob/master/proposals/nontrapping-float-to-int-conversion/Overview.md
0 commit comments