@@ -751,11 +751,6 @@ SystemZTargetLowering::SystemZTargetLowering(const TargetMachine &TM,
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setOperationAction (ISD::INTRINSIC_W_CHAIN, MVT::Other, Custom);
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setOperationAction (ISD::INTRINSIC_WO_CHAIN, MVT::Other, Custom);
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- // We're not using SJLJ for exception handling, but they're implemented
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- // solely to support use of __builtin_setjmp / __builtin_longjmp.
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- setOperationAction (ISD::EH_SJLJ_SETJMP, MVT::i32 , Custom);
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- setOperationAction (ISD::EH_SJLJ_LONGJMP, MVT::Other, Custom);
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-
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// We want to use MVC in preference to even a single load/store pair.
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MaxStoresPerMemcpy = Subtarget.hasVector () ? 2 : 0 ;
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MaxStoresPerMemcpyOptSize = 0 ;
@@ -945,240 +940,6 @@ bool SystemZTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
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return SystemZVectorConstantInfo (Imm).isVectorConstantLegal (Subtarget);
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}
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- MachineBasicBlock *
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- SystemZTargetLowering::emitEHSjLjSetJmp (MachineInstr &MI,
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- MachineBasicBlock *MBB) const {
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- DebugLoc DL = MI.getDebugLoc ();
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- const TargetInstrInfo *TII = Subtarget.getInstrInfo ();
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- const SystemZRegisterInfo *TRI = Subtarget.getRegisterInfo ();
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-
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- MachineFunction *MF = MBB->getParent ();
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- MachineRegisterInfo &MRI = MF->getRegInfo ();
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-
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- const BasicBlock *BB = MBB->getBasicBlock ();
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- MachineFunction::iterator I = ++MBB->getIterator ();
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-
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- Register DstReg = MI.getOperand (0 ).getReg ();
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- const TargetRegisterClass *RC = MRI.getRegClass (DstReg);
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- assert (TRI->isTypeLegalForClass (*RC, MVT::i32 ) && " Invalid destination!" );
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- Register mainDstReg = MRI.createVirtualRegister (RC);
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- Register restoreDstReg = MRI.createVirtualRegister (RC);
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-
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- MVT PVT = getPointerTy (MF->getDataLayout ());
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- assert ((PVT == MVT::i64 || PVT == MVT::i32 ) && " Invalid Pointer Size!" );
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- // For v = setjmp(buf), we generate.
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- // Algorithm:
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- //
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- // ---------
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- // | thisMBB |
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- // ---------
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- // |
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- // ------------------------
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- // | |
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- // ---------- ---------------
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- // | mainMBB | | restoreMBB |
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- // | v = 0 | | v = 1 |
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- // ---------- ---------------
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- // | |
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- // -------------------------
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- // |
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- // -----------------------------
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- // | sinkMBB |
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- // | phi(v_mainMBB,v_restoreMBB) |
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- // -----------------------------
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- // thisMBB:
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- // buf[FPOffset] = Frame Pointer if hasFP.
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- // buf[LabelOffset] = restoreMBB <-- takes address of restoreMBB.
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- // buf[BCOffset] = Backchain value if building with -mbackchain.
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- // buf[SPOffset] = Stack Pointer.
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- // buf[LPOffset] = We never write this slot with R13, gcc stores R13 always.
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- // SjLjSetup restoreMBB
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- // mainMBB:
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- // v_main = 0
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- // sinkMBB:
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- // v = phi(v_main, v_restore)
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- // restoreMBB:
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- // v_restore = 1
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-
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- MachineBasicBlock *thisMBB = MBB;
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- MachineBasicBlock *mainMBB = MF->CreateMachineBasicBlock (BB);
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- MachineBasicBlock *sinkMBB = MF->CreateMachineBasicBlock (BB);
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- MachineBasicBlock *restoreMBB = MF->CreateMachineBasicBlock (BB);
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-
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- MF->insert (I, mainMBB);
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- MF->insert (I, sinkMBB);
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- MF->push_back (restoreMBB);
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- restoreMBB->setMachineBlockAddressTaken ();
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-
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- MachineInstrBuilder MIB;
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-
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- // Transfer the remainder of BB and its successor edges to sinkMBB.
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- sinkMBB->splice (sinkMBB->begin (), MBB,
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- std::next (MachineBasicBlock::iterator (MI)), MBB->end ());
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- sinkMBB->transferSuccessorsAndUpdatePHIs (MBB);
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-
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- // thisMBB:
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- const int64_t FPOffset = 0 ; // Slot 1.
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- const int64_t LabelOffset = 1 * PVT.getStoreSize (); // Slot 2.
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- const int64_t BCOffset = 2 * PVT.getStoreSize (); // Slot 3.
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- const int64_t SPOffset = 3 * PVT.getStoreSize (); // Slot 4.
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-
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- // Buf address.
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- Register BufReg = MI.getOperand (1 ).getReg ();
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-
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- const TargetRegisterClass *PtrRC = getRegClassFor (PVT);
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- unsigned LabelReg = MRI.createVirtualRegister (PtrRC);
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-
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- // Prepare IP for longjmp.
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- BuildMI (*thisMBB, MI, DL, TII->get (SystemZ::LARL), LabelReg)
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- .addMBB (restoreMBB);
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- // Store IP for return from jmp, slot 2, offset = 1.
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- BuildMI (*thisMBB, MI, DL, TII->get (SystemZ::STG))
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- .addReg (LabelReg)
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- .addReg (BufReg)
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- .addImm (LabelOffset)
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- .addReg (0 );
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-
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- auto *SpecialRegs = Subtarget.getSpecialRegisters ();
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- bool HasFP = Subtarget.getFrameLowering ()->hasFP (*MF);
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- if (HasFP) {
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- BuildMI (*thisMBB, MI, DL, TII->get (SystemZ::STG))
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- .addReg (SpecialRegs->getFramePointerRegister ())
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- .addReg (BufReg)
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- .addImm (FPOffset)
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- .addReg (0 );
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- }
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-
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- // Store SP.
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- BuildMI (*thisMBB, MI, DL, TII->get (SystemZ::STG))
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- .addReg (SpecialRegs->getStackPointerRegister ())
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- .addReg (BufReg)
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- .addImm (SPOffset)
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- .addReg (0 );
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-
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- // Slot 3(Offset = 2) Backchain value (if building with -mbackchain).
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- bool BackChain = MF->getSubtarget <SystemZSubtarget>().hasBackChain ();
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- if (BackChain) {
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- Register BCReg = MRI.createVirtualRegister (RC);
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- auto *TFL = Subtarget.getFrameLowering <SystemZFrameLowering>();
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- MIB = BuildMI (*thisMBB, MI, DL, TII->get (SystemZ::LG), BCReg)
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- .addReg (SpecialRegs->getStackPointerRegister ())
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- .addImm (TFL->getBackchainOffset (*MF))
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- .addReg (0 );
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-
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- BuildMI (*thisMBB, MI, DL, TII->get (SystemZ::STG))
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- .addReg (BCReg)
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- .addReg (BufReg)
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- .addImm (BCOffset)
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- .addReg (0 );
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- }
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-
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- // Setup.
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- MIB = BuildMI (*thisMBB, MI, DL, TII->get (SystemZ::EH_SjLj_Setup))
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- .addMBB (restoreMBB);
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-
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- const SystemZRegisterInfo *RegInfo = Subtarget.getRegisterInfo ();
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- MIB.addRegMask (RegInfo->getNoPreservedMask ());
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-
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- thisMBB->addSuccessor (mainMBB);
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- thisMBB->addSuccessor (restoreMBB);
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-
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- // mainMBB:
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- BuildMI (mainMBB, DL, TII->get (SystemZ::LHI), mainDstReg).addImm (0 );
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- mainMBB->addSuccessor (sinkMBB);
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-
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- // sinkMBB:
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- BuildMI (*sinkMBB, sinkMBB->begin (), DL, TII->get (SystemZ::PHI), DstReg)
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- .addReg (mainDstReg)
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- .addMBB (mainMBB)
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- .addReg (restoreDstReg)
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- .addMBB (restoreMBB);
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-
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- // restoreMBB.
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- BuildMI (restoreMBB, DL, TII->get (SystemZ::LHI), restoreDstReg).addImm (1 );
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- BuildMI (restoreMBB, DL, TII->get (SystemZ::J)).addMBB (sinkMBB);
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- restoreMBB->addSuccessor (sinkMBB);
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-
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- MI.eraseFromParent ();
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-
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- return sinkMBB;
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- }
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-
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- MachineBasicBlock *
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- SystemZTargetLowering::emitEHSjLjLongJmp (MachineInstr &MI,
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- MachineBasicBlock *MBB) const {
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-
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- DebugLoc DL = MI.getDebugLoc ();
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- const TargetInstrInfo *TII = Subtarget.getInstrInfo ();
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-
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- MachineFunction *MF = MBB->getParent ();
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- MachineRegisterInfo &MRI = MF->getRegInfo ();
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-
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- MVT PVT = getPointerTy (MF->getDataLayout ());
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- assert ((PVT == MVT::i64 || PVT == MVT::i32 ) && " Invalid Pointer Size!" );
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- Register BufReg = MI.getOperand (0 ).getReg ();
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- const TargetRegisterClass *RC = MRI.getRegClass (BufReg);
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- auto *SpecialRegs = Subtarget.getSpecialRegisters ();
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-
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- Register Tmp = MRI.createVirtualRegister (RC);
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- Register BCReg = MRI.createVirtualRegister (RC);
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-
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- MachineInstrBuilder MIB;
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-
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- const int64_t FPOffset = 0 ;
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- const int64_t LabelOffset = 1 * PVT.getStoreSize ();
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- const int64_t BCOffset = 2 * PVT.getStoreSize ();
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- const int64_t SPOffset = 3 * PVT.getStoreSize ();
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- const int64_t LPOffset = 4 * PVT.getStoreSize ();
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-
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- MIB = BuildMI (*MBB, MI, DL, TII->get (SystemZ::LG), Tmp)
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- .addReg (BufReg)
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- .addImm (LabelOffset)
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- .addReg (0 );
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-
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- MIB = BuildMI (*MBB, MI, DL, TII->get (SystemZ::LG),
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- SpecialRegs->getFramePointerRegister ())
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- .addReg (BufReg)
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- .addImm (FPOffset)
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- .addReg (0 );
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-
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- // We are restoring R13 even though we never stored in setjmp from llvm,
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- // as gcc always stores R13 in builtin_setjmp. We could have mixed code
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- // gcc setjmp and llvm longjmp.
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- MIB = BuildMI (*MBB, MI, DL, TII->get (SystemZ::LG), SystemZ::R13D)
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- .addReg (BufReg)
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- .addImm (LPOffset)
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- .addReg (0 );
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-
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- bool BackChain = MF->getSubtarget <SystemZSubtarget>().hasBackChain ();
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- if (BackChain) {
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- MIB = BuildMI (*MBB, MI, DL, TII->get (SystemZ::LG), BCReg)
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- .addReg (BufReg)
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- .addImm (BCOffset)
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- .addReg (0 );
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- }
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-
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- MIB = BuildMI (*MBB, MI, DL, TII->get (SystemZ::LG),
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- SpecialRegs->getStackPointerRegister ())
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- .addReg (BufReg)
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- .addImm (SPOffset)
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- .addReg (0 );
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-
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- if (BackChain) {
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- auto *TFL = Subtarget.getFrameLowering <SystemZFrameLowering>();
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- BuildMI (*MBB, MI, DL, TII->get (SystemZ::STG))
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- .addReg (BCReg)
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- .addReg (SpecialRegs->getStackPointerRegister ())
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- .addImm (TFL->getBackchainOffset (*MF))
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- .addReg (0 );
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- }
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-
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- MIB = BuildMI (*MBB, MI, DL, TII->get (SystemZ::BR)).addReg (Tmp);
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-
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- MI.eraseFromParent ();
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- return MBB;
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- }
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-
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// / Returns true if stack probing through inline assembly is requested.
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bool SystemZTargetLowering::hasInlineStackProbe (const MachineFunction &MF) const {
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// If the function specifically requests inline stack probes, emit them.
@@ -6531,14 +6292,6 @@ SDValue SystemZTargetLowering::LowerOperation(SDValue Op,
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return lowerGET_ROUNDING (Op, DAG);
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case ISD::READCYCLECOUNTER:
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return lowerREADCYCLECOUNTER (Op, DAG);
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- case ISD::EH_SJLJ_SETJMP:
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- case ISD::EH_SJLJ_LONGJMP:
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- // These operations are legal on our platform, but we cannot actually
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- // set the operation action to Legal as common code would treat this
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- // as equivalent to Expand. Instead, we keep the operation action to
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- // Custom and just leave them unchanged here.
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- return Op;
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-
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default :
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llvm_unreachable (" Unexpected node to lower" );
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}
@@ -9980,10 +9733,6 @@ MachineBasicBlock *SystemZTargetLowering::EmitInstrWithCustomInserter(
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case SystemZ::PROBED_ALLOCA:
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return emitProbedAlloca (MI, MBB);
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- case SystemZ::EH_SjLj_SetJmp:
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- return emitEHSjLjSetJmp (MI, MBB);
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- case SystemZ::EH_SjLj_LongJmp:
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- return emitEHSjLjLongJmp (MI, MBB);
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case TargetOpcode::STACKMAP:
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case TargetOpcode::PATCHPOINT:
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