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[X86] Use nneg flag when trying to convert uitofp -> sitofp
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -48267,7 +48267,7 @@ static SDValue combineAndShuffleNot(SDNode *N, SelectionDAG &DAG,
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// We do not split for SSE at all, but we need to split vectors for AVX1 and
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// AVX2.
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if (!Subtarget.useAVX512Regs() && VT.is512BitVector() &&
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if (!Subtarget.useAVX512Regs() && VT.is512BitVector() &&
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TLI.isTypeLegal(VT.getHalfNumVectorElementsVT(*DAG.getContext()))) {
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SDValue LoX, HiX;
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std::tie(LoX, HiX) = splitVector(X, DAG, DL);
@@ -54062,7 +54062,8 @@ static SDValue combineUIntToFP(SDNode *N, SelectionDAG &DAG,
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// Since UINT_TO_FP is legal (it's marked custom), dag combiner won't
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// optimize it to a SINT_TO_FP when the sign bit is known zero. Perform
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// the optimization here.
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if (DAG.SignBitIsZero(Op0)) {
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SDNodeFlags Flags = N->getFlags();
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if (Flags.hasNonNeg() || DAG.SignBitIsZero(Op0)) {
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if (IsStrict)
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return DAG.getNode(ISD::STRICT_SINT_TO_FP, SDLoc(N), {VT, MVT::Other},
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{N->getOperand(0), Op0});

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