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Fix Passing TargetOptions by Value in TargetMachines for AMDGPU (#79866)
`TargetOptions` is currently passed by value in AMDGPU targets, which makes unnecessary copies. This PR fixes this issue.
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4 files changed

+6
-6
lines changed

4 files changed

+6
-6
lines changed

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -571,7 +571,7 @@ static Reloc::Model getEffectiveRelocModel(std::optional<Reloc::Model> RM) {
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AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, const Triple &TT,
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StringRef CPU, StringRef FS,
574-
TargetOptions Options,
574+
const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM,
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CodeGenOptLevel OptLevel)
@@ -863,7 +863,7 @@ AMDGPUTargetMachine::getAddressSpaceForPseudoSourceKind(unsigned Kind) const {
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GCNTargetMachine::GCNTargetMachine(const Target &T, const Triple &TT,
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StringRef CPU, StringRef FS,
866-
TargetOptions Options,
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const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM,
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CodeGenOptLevel OL, bool JIT)

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -39,7 +39,7 @@ class AMDGPUTargetMachine : public LLVMTargetMachine {
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static bool EnableLowerModuleLDS;
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AMDGPUTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
42-
StringRef FS, TargetOptions Options,
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StringRef FS, const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM, CodeGenOptLevel OL);
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~AMDGPUTargetMachine() override;
@@ -78,7 +78,7 @@ class GCNTargetMachine final : public AMDGPUTargetMachine {
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public:
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GCNTargetMachine(const Target &T, const Triple &TT, StringRef CPU,
81-
StringRef FS, TargetOptions Options,
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StringRef FS, const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
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bool JIT);

llvm/lib/Target/AMDGPU/R600TargetMachine.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ static MachineSchedRegistry R600SchedRegistry("r600",
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R600TargetMachine::R600TargetMachine(const Target &T, const Triple &TT,
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StringRef CPU, StringRef FS,
53-
TargetOptions Options,
53+
const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM,
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CodeGenOptLevel OL, bool JIT)

llvm/lib/Target/AMDGPU/R600TargetMachine.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,7 @@ class R600TargetMachine final : public AMDGPUTargetMachine {
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public:
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R600TargetMachine(const Target &T, const Triple &TT, StringRef CPU,
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StringRef FS, TargetOptions Options,
34+
StringRef FS, const TargetOptions &Options,
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std::optional<Reloc::Model> RM,
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std::optional<CodeModel::Model> CM, CodeGenOptLevel OL,
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bool JIT);

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