[AArch64] Additional test coverage for PR67879 (NFC)

Introduce further test exercizing `isAArch64FrameOffsetLegal`.

Author: antoniofrighetto

llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-load-rcpc_immo.ll

@@ -1,4 +1,4 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "\b(sp)\b" --filter "^\s*(ld|st[^r]|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)"
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "(?!^\s*lda.*\bsp\b)^\s*.*\bsp\b" --filter "^\s*(ld|st[^r]|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)"
 ; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.4a -mattr=+rcpc-immo -global-isel=true -global-isel-abort=2 -O0 | FileCheck %s --check-prefixes=CHECK,GISEL
 ; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.4a -mattr=+rcpc-immo -global-isel=false -O1 | FileCheck %s --check-prefixes=CHECK,SDAG
 
@@ -815,3 +815,82 @@ define i128 @load_atomic_i128_unaligned_seq_cst_const(ptr readonly %ptr) {
     %r = load atomic i128, ptr %gep seq_cst, align 1
     ret i128 %r
 }
+
+define i8 @load_atomic_i8_from_gep() {
+; GISEL-LABEL: load_atomic_i8_from_gep:
+; GISEL:    bl init
+; GISEL:    ldapurb w0, [x8, #1]
+;
+; SDAG-LABEL: load_atomic_i8_from_gep:
+; SDAG:    bl init
+; SDAG:    ldapurb w0, [sp, #13]
+  %a = alloca [3 x i8]
+  call void @init(ptr %a)
+  %arrayidx  = getelementptr [3 x i8], ptr %a, i64 0, i64 1
+  %l = load atomic i8, ptr %arrayidx acquire, align 8
+  ret i8 %l
+}
+
+define i16 @load_atomic_i16_from_gep() {
+; GISEL-LABEL: load_atomic_i16_from_gep:
+; GISEL:    bl init
+; GISEL:    ldapurh w0, [x8, #2]
+;
+; SDAG-LABEL: load_atomic_i16_from_gep:
+; SDAG:    bl init
+; SDAG:    ldapurh w0, [sp, #10]
+  %a = alloca [3 x i16]
+  call void @init(ptr %a)
+  %arrayidx  = getelementptr [3 x i16], ptr %a, i64 0, i64 1
+  %l = load atomic i16, ptr %arrayidx acquire, align 8
+  ret i16 %l
+}
+
+define i32 @load_atomic_i32_from_gep() {
+; GISEL-LABEL: load_atomic_i32_from_gep:
+; GISEL:    bl init
+; GISEL:    ldapur w0, [x8, #4]
+;
+; SDAG-LABEL: load_atomic_i32_from_gep:
+; SDAG:    bl init
+; SDAG:    ldapur w0, [sp, #8]
+  %a = alloca [3 x i32]
+  call void @init(ptr %a)
+  %arrayidx  = getelementptr [3 x i32], ptr %a, i64 0, i64 1
+  %l = load atomic i32, ptr %arrayidx acquire, align 8
+  ret i32 %l
+}
+
+define i64 @load_atomic_i64_from_gep() {
+; GISEL-LABEL: load_atomic_i64_from_gep:
+; GISEL:    bl init
+; GISEL:    ldapur x0, [x8, #8]
+;
+; SDAG-LABEL: load_atomic_i64_from_gep:
+; SDAG:    bl init
+; SDAG:    ldapur x0, [sp, #16]
+  %a = alloca [3 x i64]
+  call void @init(ptr %a)
+  %arrayidx  = getelementptr [3 x i64], ptr %a, i64 0, i64 1
+  %l = load atomic i64, ptr %arrayidx acquire, align 8
+  ret i64 %l
+}
+
+define i128 @load_atomic_i128_from_gep() {
+; GISEL-LABEL: load_atomic_i128_from_gep:
+; GISEL:    bl init
+; GISEL:    ldp x0, x1, [x8, #16]
+; GISEL:    dmb ishld
+;
+; SDAG-LABEL: load_atomic_i128_from_gep:
+; SDAG:    bl init
+; SDAG:    ldp x0, x1, [sp, #16]
+; SDAG:    dmb ishld
+  %a = alloca [3 x i128]
+  call void @init(ptr %a)
+  %arrayidx  = getelementptr [3 x i128], ptr %a, i64 0, i64 1
+  %l = load atomic i128, ptr %arrayidx acquire, align 16
+  ret i128 %l
+}
+
+declare void @init(ptr)

llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-rcpc_immo.ll

@@ -1,4 +1,4 @@
-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "\b(sp)\b" --filter "^\s*(ld[^r]|st|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)"
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "(?!^\s*stl.*\bsp\b)^\s*.*\bsp\b" --filter "^\s*(ld[^r]|st|swp|cas|bl|add|and|eor|orn|orr|sub|mvn|sxt|cmp|ccmp|csel|dmb)"
 ; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.4a -mattr=+rcpc-immo -global-isel=true -global-isel-abort=2 -O0 | FileCheck %s --check-prefixes=CHECK,GISEL
 ; RUN: llc %s -o - -verify-machineinstrs -mtriple=aarch64 -mattr=+v8.4a -mattr=+rcpc-immo -global-isel=false -O1 | FileCheck %s --check-prefixes=CHECK,SDAG
 
@@ -356,3 +356,86 @@ define void @store_atomic_i128_unaligned_seq_cst(i128 %value, ptr %ptr) {
     store atomic i128 %value, ptr %gep seq_cst, align 1
     ret void
 }
+
+; TODO: missed opportunity to emit a stlurb w/ GISel
+define void @store_atomic_i8_from_gep() {
+; GISEL-LABEL: store_atomic_i8_from_gep:
+; GISEL:    bl init
+; GISEL:    add x9, x8, #1
+; GISEL:    stlrb w8, [x9]
+;
+; SDAG-LABEL: store_atomic_i8_from_gep:
+; SDAG:    bl init
+; SDAG:    stlurb wzr, [sp, #13]
+  %a = alloca [3 x i8]
+  call void @init(ptr %a)
+  %arrayidx  = getelementptr [3 x i8], ptr %a, i64 0, i64 1
+  store atomic i8 0, ptr %arrayidx release, align 8
+  ret void
+}
+
+; TODO: missed opportunity to emit a stlurh w/ GISel
+define void @store_atomic_i16_from_gep() {
+; GISEL-LABEL: store_atomic_i16_from_gep:
+; GISEL:    bl init
+; GISEL:    add x9, x8, #2
+; GISEL:    stlrh w8, [x9]
+;
+; SDAG-LABEL: store_atomic_i16_from_gep:
+; SDAG:    bl init
+; SDAG:    stlurh wzr, [sp, #10]
+  %a = alloca [3 x i16]
+  call void @init(ptr %a)
+  %arrayidx  = getelementptr [3 x i16], ptr %a, i64 0, i64 1
+  store atomic i16 0, ptr %arrayidx release, align 8
+  ret void
+}
+
+define void @store_atomic_i32_from_gep() {
+; GISEL-LABEL: store_atomic_i32_from_gep:
+; GISEL:    bl init
+; GISEL:    stlur w8, [x9, #4]
+;
+; SDAG-LABEL: store_atomic_i32_from_gep:
+; SDAG:    bl init
+; SDAG:    stlur wzr, [sp, #8]
+  %a = alloca [3 x i32]
+  call void @init(ptr %a)
+  %arrayidx  = getelementptr [3 x i32], ptr %a, i64 0, i64 1
+  store atomic i32 0, ptr %arrayidx release, align 8
+  ret void
+}
+
+define void @store_atomic_i64_from_gep() {
+; GISEL-LABEL: store_atomic_i64_from_gep:
+; GISEL:    bl init
+; GISEL:    stlur x8, [x9, #8]
+;
+; SDAG-LABEL: store_atomic_i64_from_gep:
+; SDAG:    bl init
+; SDAG:    stlur xzr, [sp, #16]
+  %a = alloca [3 x i64]
+  call void @init(ptr %a)
+  %arrayidx  = getelementptr [3 x i64], ptr %a, i64 0, i64 1
+  store atomic i64 0, ptr %arrayidx release, align 8
+  ret void
+}
+
+define void @store_atomic_i128_from_gep() {
+; GISEL-LABEL: store_atomic_i128_from_gep:
+; GISEL:    bl init
+; GISEL:    dmb ish
+; GISEL:    stp x8, x8, [x9, #16]
+;
+; SDAG-LABEL: store_atomic_i128_from_gep:
+; SDAG:    bl init
+; SDAG:    dmb ish
+; SDAG:    stp xzr, xzr, [sp, #16]
+  %a = alloca [3 x i128]
+  call void @init(ptr %a)
+  %arrayidx  = getelementptr [3 x i128], ptr %a, i64 0, i64 1
+  store atomic i128 0, ptr %arrayidx release, align 16
+  ret void
+}
+
+declare void @init(ptr)