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[ASAN] Make asan pass idempotent.
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2 files changed

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llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp

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@@ -1249,8 +1249,19 @@ AddressSanitizerPass::AddressSanitizerPass(
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UseOdrIndicator(UseOdrIndicator), DestructorKind(DestructorKind),
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ConstructorKind(ConstructorKind) {}
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static bool hasAsanModuleCtor(Module &M) {
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if (M.getFunction(kAsanModuleCtorName))
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return true;
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return false;
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}
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PreservedAnalyses AddressSanitizerPass::run(Module &M,
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ModuleAnalysisManager &MAM) {
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// Return early if asan.module_ctor is already present in the module.
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// This implies that asan pass has already run before.
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if (hasAsanModuleCtor(M))
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return PreservedAnalyses::all();
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ModuleAddressSanitizer ModuleSanitizer(
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M, Options.InsertVersionCheck, Options.CompileKernel, Options.Recover,
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UseGlobalGC, UseOdrIndicator, DestructorKind, ConstructorKind);
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --check-globals all --version 5
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; This test checks in the second run, function is not instrumented again.
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; RUN: opt < %s -passes=asan,asan -S | FileCheck %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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; Function with sanitize_address is instrumented.
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; Function Attrs: nounwind uwtable
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;.
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; CHECK: @llvm.used = appending global [1 x ptr] [ptr @asan.module_ctor], section "llvm.metadata"
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; CHECK: @___asan_globals_registered = common hidden global i64 0
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; CHECK: @__start_asan_globals = extern_weak hidden global i64
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; CHECK: @__stop_asan_globals = extern_weak hidden global i64
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; CHECK: @llvm.global_ctors = appending global [1 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 1, ptr @asan.module_ctor, ptr @asan.module_ctor }]
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;.
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define void @instr_sa(ptr %a) sanitize_address {
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; CHECK-LABEL: define void @instr_sa(
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; CHECK-SAME: ptr [[A:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[A]] to i64
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; CHECK-NEXT: [[TMP1:%.*]] = lshr i64 [[TMP0]], 3
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; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 2147450880
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; CHECK-NEXT: [[TMP3:%.*]] = inttoptr i64 [[TMP2]] to ptr
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; CHECK-NEXT: [[TMP4:%.*]] = load i8, ptr [[TMP3]], align 1
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; CHECK-NEXT: [[TMP5:%.*]] = icmp ne i8 [[TMP4]], 0
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; CHECK-NEXT: br i1 [[TMP5]], label %[[BB6:.*]], label %[[BB12:.*]], !prof [[PROF0:![0-9]+]]
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; CHECK: [[BB6]]:
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; CHECK-NEXT: [[TMP7:%.*]] = and i64 [[TMP0]], 7
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; CHECK-NEXT: [[TMP8:%.*]] = add i64 [[TMP7]], 3
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; CHECK-NEXT: [[TMP9:%.*]] = trunc i64 [[TMP8]] to i8
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; CHECK-NEXT: [[TMP10:%.*]] = icmp sge i8 [[TMP9]], [[TMP4]]
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; CHECK-NEXT: br i1 [[TMP10]], label %[[BB11:.*]], label %[[BB12]]
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; CHECK: [[BB11]]:
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; CHECK-NEXT: call void @__asan_report_load4(i64 [[TMP0]]) #[[ATTR3:[0-9]+]]
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; CHECK-NEXT: unreachable
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; CHECK: [[BB12]]:
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; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[A]], align 4
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; CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], 1
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; CHECK-NEXT: store i32 [[TMP2]], ptr [[A]], align 4
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; CHECK-NEXT: ret void
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;
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entry:
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%tmp1 = load i32, ptr %a, align 4
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%tmp2 = add i32 %tmp1, 1
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store i32 %tmp2, ptr %a, align 4
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ret void
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}
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;.
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; CHECK: attributes #[[ATTR0]] = { sanitize_address }
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; CHECK: attributes #[[ATTR1:[0-9]+]] = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
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; CHECK: attributes #[[ATTR2:[0-9]+]] = { nounwind }
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; CHECK: attributes #[[ATTR3]] = { nomerge }
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;.
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; CHECK: [[PROF0]] = !{!"branch_weights", i32 1, i32 1048575}
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;.

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