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1 parent 421d6cc commit 8a417b7Copy full SHA for 8a417b7
llvm/lib/Target/X86/X86FixupLEAs.cpp
@@ -330,8 +330,8 @@ static inline bool isInefficientLEAReg(unsigned Reg) {
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Reg == X86::R13D || Reg == X86::R13;
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}
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-/// Returns true if this LEA uses base an index registers, and the base register
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-/// is known to be inefficient for the subtarget.
+/// Returns true if this LEA uses base and index registers, and the base
+/// register is known to be inefficient for the subtarget.
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// TODO: use a variant scheduling class to model the latency profile
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// of LEA instructions, and implement this logic as a scheduling predicate.
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static inline bool hasInefficientLEABaseReg(const MachineOperand &Base,
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