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test cases with +zve32x for vector add; clang-format
1 parent 36d13c2 commit 8a442b0

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2 files changed

+227
-8
lines changed

2 files changed

+227
-8
lines changed

llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp

Lines changed: 12 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -82,16 +82,19 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
8282

8383
getActionDefinitionsBuilder({G_ADD, G_SUB, G_AND, G_OR, G_XOR})
8484
.legalFor({s32, sXLen})
85-
.legalIf(all(typeInSet(0, AllVecTys),
86-
LegalityPredicate([=, &ST](const LegalityQuery &Query) {
87-
return ST.hasVInstructions() &&
88-
(Query.Types[0].getScalarSizeInBits() != 64 || ST.hasVInstructionsI64()) &&
89-
(Query.Types[0].getElementCount().getKnownMinValue() != 1 || ST.getELen() == 64);
90-
})))
85+
.legalIf(all(
86+
typeInSet(0, AllVecTys),
87+
LegalityPredicate([=, &ST](const LegalityQuery &Query) {
88+
return ST.hasVInstructions() &&
89+
(Query.Types[0].getScalarSizeInBits() != 64 || ST.hasVInstructionsI64()) &&
90+
(Query.Types[0].getElementCount().getKnownMinValue() != 1 ||
91+
ST.getELen() == 64);
92+
})))
9193
.widenScalarToNextPow2(0)
9294
.clampScalar(0, s32, sXLen);
9395

94-
getActionDefinitionsBuilder({G_UADDE, G_UADDO, G_USUBE, G_USUBO}).lower();
96+
getActionDefinitionsBuilder(
97+
{G_UADDE, G_UADDO, G_USUBE, G_USUBO}).lower();
9598

9699
getActionDefinitionsBuilder({G_SADDO, G_SSUBO}).minScalar(0, sXLen).lower();
97100

@@ -349,7 +352,8 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST)
349352

350353
// FIXME: We can do custom inline expansion like SelectionDAG.
351354
// FIXME: Legal with Zfa.
352-
getActionDefinitionsBuilder({G_FCEIL, G_FFLOOR}).libcallFor({s32, s64});
355+
getActionDefinitionsBuilder({G_FCEIL, G_FFLOOR})
356+
.libcallFor({s32, s64});
353357

354358
getActionDefinitionsBuilder(G_VASTART).customFor({p0});
355359

Lines changed: 215 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,215 @@
1+
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2+
# RUN: llc -mtriple=riscv32 -mattr=+zve32x -run-pass=legalizer %s -o - | FileCheck %s
3+
# RUN: llc -mtriple=riscv64 -mattr=+zve32x -run-pass=legalizer %s -o - | FileCheck %s
4+
---
5+
name: test_nxv2s8
6+
body: |
7+
bb.0.entry:
8+
; CHECK-LABEL: name: test_nxv2s8
9+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v8
10+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s8>) = COPY $v9
11+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 2 x s8>) = G_ADD [[COPY]], [[COPY1]]
12+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 2 x s8>)
13+
%0:_(<vscale x 2 x s8>) = COPY $v8
14+
%1:_(<vscale x 2 x s8>) = COPY $v9
15+
%2:_(<vscale x 2 x s8>) = G_ADD %0, %1
16+
PseudoRET implicit %2
17+
...
18+
---
19+
...
20+
---
21+
name: test_nxv4s8
22+
body: |
23+
bb.0.entry:
24+
; CHECK-LABEL: name: test_nxv4s8
25+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v8
26+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s8>) = COPY $v9
27+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 4 x s8>) = G_ADD [[COPY]], [[COPY1]]
28+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 4 x s8>)
29+
%0:_(<vscale x 4 x s8>) = COPY $v8
30+
%1:_(<vscale x 4 x s8>) = COPY $v9
31+
%2:_(<vscale x 4 x s8>) = G_ADD %0, %1
32+
PseudoRET implicit %2
33+
...
34+
---
35+
name: test_nxv8s8
36+
body: |
37+
bb.0.entry:
38+
; CHECK-LABEL: name: test_nxv8s8
39+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v8
40+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s8>) = COPY $v9
41+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 8 x s8>) = G_ADD [[COPY]], [[COPY1]]
42+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 8 x s8>)
43+
%0:_(<vscale x 8 x s8>) = COPY $v8
44+
%1:_(<vscale x 8 x s8>) = COPY $v9
45+
%2:_(<vscale x 8 x s8>) = G_ADD %0, %1
46+
PseudoRET implicit %2
47+
...
48+
---
49+
name: test_nxv16s8
50+
body: |
51+
bb.0.entry:
52+
; CHECK-LABEL: name: test_nxv16s8
53+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v8
54+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 16 x s8>) = COPY $v9
55+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 16 x s8>) = G_ADD [[COPY]], [[COPY1]]
56+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 16 x s8>)
57+
%0:_(<vscale x 16 x s8>) = COPY $v8
58+
%1:_(<vscale x 16 x s8>) = COPY $v9
59+
%2:_(<vscale x 16 x s8>) = G_ADD %0, %1
60+
PseudoRET implicit %2
61+
...
62+
---
63+
name: test_nxv32s8
64+
body: |
65+
bb.0.entry:
66+
; CHECK-LABEL: name: test_nxv32s8
67+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 32 x s8>) = COPY $v8
68+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 32 x s8>) = COPY $v9
69+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 32 x s8>) = G_ADD [[COPY]], [[COPY1]]
70+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 32 x s8>)
71+
%0:_(<vscale x 32 x s8>) = COPY $v8
72+
%1:_(<vscale x 32 x s8>) = COPY $v9
73+
%2:_(<vscale x 32 x s8>) = G_ADD %0, %1
74+
PseudoRET implicit %2
75+
...
76+
---
77+
name: test_nxv64s8
78+
body: |
79+
bb.0.entry:
80+
; CHECK-LABEL: name: test_nxv64s8
81+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 64 x s8>) = COPY $v8
82+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 64 x s8>) = COPY $v9
83+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 64 x s8>) = G_ADD [[COPY]], [[COPY1]]
84+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 64 x s8>)
85+
%0:_(<vscale x 64 x s8>) = COPY $v8
86+
%1:_(<vscale x 64 x s8>) = COPY $v9
87+
%2:_(<vscale x 64 x s8>) = G_ADD %0, %1
88+
PseudoRET implicit %2
89+
...
90+
---
91+
name: test_nxv2s16
92+
body: |
93+
bb.0.entry:
94+
; CHECK-LABEL: name: test_nxv2s16
95+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 2 x s16>) = COPY $v8
96+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s16>) = COPY $v9
97+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 2 x s16>) = G_ADD [[COPY]], [[COPY1]]
98+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 2 x s16>)
99+
%0:_(<vscale x 2 x s16>) = COPY $v8
100+
%1:_(<vscale x 2 x s16>) = COPY $v9
101+
%2:_(<vscale x 2 x s16>) = G_ADD %0, %1
102+
PseudoRET implicit %2
103+
...
104+
---
105+
name: test_nxv4s16
106+
body: |
107+
bb.0.entry:
108+
; CHECK-LABEL: name: test_nxv4s16
109+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 4 x s16>) = COPY $v8
110+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s16>) = COPY $v9
111+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 4 x s16>) = G_ADD [[COPY]], [[COPY1]]
112+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 4 x s16>)
113+
%0:_(<vscale x 4 x s16>) = COPY $v8
114+
%1:_(<vscale x 4 x s16>) = COPY $v9
115+
%2:_(<vscale x 4 x s16>) = G_ADD %0, %1
116+
PseudoRET implicit %2
117+
...
118+
---
119+
name: test_nxv8s16
120+
body: |
121+
bb.0.entry:
122+
; CHECK-LABEL: name: test_nxv8s16
123+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $v8
124+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s16>) = COPY $v9
125+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 8 x s16>) = G_ADD [[COPY]], [[COPY1]]
126+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 8 x s16>)
127+
%0:_(<vscale x 8 x s16>) = COPY $v8
128+
%1:_(<vscale x 8 x s16>) = COPY $v9
129+
%2:_(<vscale x 8 x s16>) = G_ADD %0, %1
130+
PseudoRET implicit %2
131+
...
132+
---
133+
name: test_nxv16s16
134+
body: |
135+
bb.0.entry:
136+
; CHECK-LABEL: name: test_nxv16s16
137+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 16 x s16>) = COPY $v8
138+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 16 x s16>) = COPY $v9
139+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 16 x s16>) = G_ADD [[COPY]], [[COPY1]]
140+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 16 x s16>)
141+
%0:_(<vscale x 16 x s16>) = COPY $v8
142+
%1:_(<vscale x 16 x s16>) = COPY $v9
143+
%2:_(<vscale x 16 x s16>) = G_ADD %0, %1
144+
PseudoRET implicit %2
145+
...
146+
---
147+
name: test_nxv32s16
148+
body: |
149+
bb.0.entry:
150+
; CHECK-LABEL: name: test_nxv32s16
151+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 32 x s16>) = COPY $v8
152+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 32 x s16>) = COPY $v9
153+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 32 x s16>) = G_ADD [[COPY]], [[COPY1]]
154+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 32 x s16>)
155+
%0:_(<vscale x 32 x s16>) = COPY $v8
156+
%1:_(<vscale x 32 x s16>) = COPY $v9
157+
%2:_(<vscale x 32 x s16>) = G_ADD %0, %1
158+
PseudoRET implicit %2
159+
...
160+
---
161+
name: test_nxv2s32
162+
body: |
163+
bb.0.entry:
164+
; CHECK-LABEL: name: test_nxv2s32
165+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 2 x s32>) = COPY $v8
166+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 2 x s32>) = COPY $v9
167+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 2 x s32>) = G_ADD [[COPY]], [[COPY1]]
168+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 2 x s32>)
169+
%0:_(<vscale x 2 x s32>) = COPY $v8
170+
%1:_(<vscale x 2 x s32>) = COPY $v9
171+
%2:_(<vscale x 2 x s32>) = G_ADD %0, %1
172+
PseudoRET implicit %2
173+
...
174+
---
175+
name: test_nxv4s32
176+
body: |
177+
bb.0.entry:
178+
; CHECK-LABEL: name: test_nxv4s32
179+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $v8
180+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 4 x s32>) = COPY $v9
181+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 4 x s32>) = G_ADD [[COPY]], [[COPY1]]
182+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 4 x s32>)
183+
%0:_(<vscale x 4 x s32>) = COPY $v8
184+
%1:_(<vscale x 4 x s32>) = COPY $v9
185+
%2:_(<vscale x 4 x s32>) = G_ADD %0, %1
186+
PseudoRET implicit %2
187+
...
188+
---
189+
name: test_nxv8s32
190+
body: |
191+
bb.0.entry:
192+
; CHECK-LABEL: name: test_nxv8s32
193+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 8 x s32>) = COPY $v8
194+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 8 x s32>) = COPY $v9
195+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 8 x s32>) = G_ADD [[COPY]], [[COPY1]]
196+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 8 x s32>)
197+
%0:_(<vscale x 8 x s32>) = COPY $v8
198+
%1:_(<vscale x 8 x s32>) = COPY $v9
199+
%2:_(<vscale x 8 x s32>) = G_ADD %0, %1
200+
PseudoRET implicit %2
201+
...
202+
---
203+
name: test_nxv16s32
204+
body: |
205+
bb.0.entry:
206+
; CHECK-LABEL: name: test_nxv16s32
207+
; CHECK: [[COPY:%[0-9]+]]:_(<vscale x 16 x s32>) = COPY $v8
208+
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(<vscale x 16 x s32>) = COPY $v9
209+
; CHECK-NEXT: [[ADD:%[0-9]+]]:_(<vscale x 16 x s32>) = G_ADD [[COPY]], [[COPY1]]
210+
; CHECK-NEXT: PseudoRET implicit [[ADD]](<vscale x 16 x s32>)
211+
%0:_(<vscale x 16 x s32>) = COPY $v8
212+
%1:_(<vscale x 16 x s32>) = COPY $v9
213+
%2:_(<vscale x 16 x s32>) = G_ADD %0, %1
214+
PseudoRET implicit %2
215+
...

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