@@ -31,8 +31,8 @@ def OP_MLAL : Op<(op "+", $p0, (call "vmull", $p1, $p2))>;
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def OP_MULLHi : Op<(call "vmull", (call "vget_high", $p0),
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(call "vget_high", $p1))>;
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def OP_MULLHi_P64 : Op<(call "vmull",
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- (cast "poly64_t", (call "vget_high", $p0)),
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- (cast "poly64_t", (call "vget_high", $p1)))>;
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+ (bitcast "poly64_t", (call "vget_high", $p0)),
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+ (bitcast "poly64_t", (call "vget_high", $p1)))>;
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def OP_MULLHi_N : Op<(call "vmull_n", (call "vget_high", $p0), $p1)>;
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def OP_MLALHi : Op<(call "vmlal", $p0, (call "vget_high", $p1),
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(call "vget_high", $p2))>;
@@ -95,11 +95,11 @@ def OP_TRN2 : Op<(shuffle $p0, $p1, (interleave
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def OP_ZIP2 : Op<(shuffle $p0, $p1, (highhalf (interleave mask0, mask1)))>;
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def OP_UZP2 : Op<(shuffle $p0, $p1, (add (decimate (rotl mask0, 1), 2),
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(decimate (rotl mask1, 1), 2)))>;
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- def OP_EQ : Op<(cast "R", (op "==", $p0, $p1))>;
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- def OP_GE : Op<(cast "R", (op ">=", $p0, $p1))>;
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- def OP_LE : Op<(cast "R", (op "<=", $p0, $p1))>;
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- def OP_GT : Op<(cast "R", (op ">", $p0, $p1))>;
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- def OP_LT : Op<(cast "R", (op "<", $p0, $p1))>;
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+ def OP_EQ : Op<(bitcast "R", (op "==", $p0, $p1))>;
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+ def OP_GE : Op<(bitcast "R", (op ">=", $p0, $p1))>;
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+ def OP_LE : Op<(bitcast "R", (op "<=", $p0, $p1))>;
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+ def OP_GT : Op<(bitcast "R", (op ">", $p0, $p1))>;
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+ def OP_LT : Op<(bitcast "R", (op "<", $p0, $p1))>;
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def OP_NEG : Op<(op "-", $p0)>;
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def OP_NOT : Op<(op "~", $p0)>;
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def OP_AND : Op<(op "&", $p0, $p1)>;
@@ -108,33 +108,33 @@ def OP_XOR : Op<(op "^", $p0, $p1)>;
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def OP_ANDN : Op<(op "&", $p0, (op "~", $p1))>;
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def OP_ORN : Op<(op "|", $p0, (op "~", $p1))>;
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def OP_CAST : LOp<[(save_temp $promote, $p0),
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- (cast "R", $promote)]>;
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+ (bitcast "R", $promote)]>;
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def OP_HI : Op<(shuffle $p0, $p0, (highhalf mask0))>;
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def OP_LO : Op<(shuffle $p0, $p0, (lowhalf mask0))>;
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def OP_CONC : Op<(shuffle $p0, $p1, (add mask0, mask1))>;
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def OP_DUP : Op<(dup $p0)>;
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def OP_DUP_LN : Op<(call_mangled "splat_lane", $p0, $p1)>;
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- def OP_SEL : Op<(cast "R", (op "|",
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- (op "&", $p0, (cast $p0, $p1)),
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- (op "&", (op "~", $p0), (cast $p0, $p2))))>;
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+ def OP_SEL : Op<(bitcast "R", (op "|",
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+ (op "&", $p0, (bitcast $p0, $p1)),
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+ (op "&", (op "~", $p0), (bitcast $p0, $p2))))>;
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def OP_REV16 : Op<(shuffle $p0, $p0, (rev 16, mask0))>;
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def OP_REV32 : Op<(shuffle $p0, $p0, (rev 32, mask0))>;
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def OP_REV64 : Op<(shuffle $p0, $p0, (rev 64, mask0))>;
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def OP_XTN : Op<(call "vcombine", $p0, (call "vmovn", $p1))>;
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- def OP_SQXTUN : Op<(call "vcombine", (cast $p0, "U", $p0),
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+ def OP_SQXTUN : Op<(call "vcombine", (bitcast $p0, "U", $p0),
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(call "vqmovun", $p1))>;
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def OP_QXTN : Op<(call "vcombine", $p0, (call "vqmovn", $p1))>;
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def OP_VCVT_NA_HI_F16 : Op<(call "vcombine", $p0, (call "vcvt_f16_f32", $p1))>;
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def OP_VCVT_NA_HI_F32 : Op<(call "vcombine", $p0, (call "vcvt_f32_f64", $p1))>;
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def OP_VCVT_EX_HI_F32 : Op<(call "vcvt_f32_f16", (call "vget_high", $p0))>;
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def OP_VCVT_EX_HI_F64 : Op<(call "vcvt_f64_f32", (call "vget_high", $p0))>;
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def OP_VCVTX_HI : Op<(call "vcombine", $p0, (call "vcvtx_f32", $p1))>;
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- def OP_REINT : Op<(cast "R", $p0)>;
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+ def OP_REINT : Op<(bitcast "R", $p0)>;
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def OP_ADDHNHi : Op<(call "vcombine", $p0, (call "vaddhn", $p1, $p2))>;
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def OP_RADDHNHi : Op<(call "vcombine", $p0, (call "vraddhn", $p1, $p2))>;
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def OP_SUBHNHi : Op<(call "vcombine", $p0, (call "vsubhn", $p1, $p2))>;
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def OP_RSUBHNHi : Op<(call "vcombine", $p0, (call "vrsubhn", $p1, $p2))>;
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- def OP_ABDL : Op<(cast "R", (call "vmovl", (cast $p0, "U",
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+ def OP_ABDL : Op<(bitcast "R", (call "vmovl", (bitcast $p0, "U",
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(call "vabd", $p0, $p1))))>;
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def OP_ABDLHi : Op<(call "vabdl", (call "vget_high", $p0),
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(call "vget_high", $p1))>;
@@ -152,15 +152,15 @@ def OP_QDMLSLHi : Op<(call "vqdmlsl", $p0, (call "vget_high", $p1),
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(call "vget_high", $p2))>;
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def OP_QDMLSLHi_N : Op<(call "vqdmlsl_n", $p0, (call "vget_high", $p1), $p2)>;
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def OP_DIV : Op<(op "/", $p0, $p1)>;
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- def OP_LONG_HI : Op<(cast "R", (call (name_replace "_high_", "_"),
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+ def OP_LONG_HI : Op<(bitcast "R", (call (name_replace "_high_", "_"),
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(call "vget_high", $p0), $p1))>;
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- def OP_NARROW_HI : Op<(cast "R", (call "vcombine",
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- (cast "R", "H", $p0),
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- (cast "R", "H",
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+ def OP_NARROW_HI : Op<(bitcast "R", (call "vcombine",
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+ (bitcast "R", "H", $p0),
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+ (bitcast "R", "H",
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(call (name_replace "_high_", "_"),
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$p1, $p2))))>;
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def OP_MOVL_HI : LOp<[(save_temp $a1, (call "vget_high", $p0)),
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- (cast "R",
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+ (bitcast "R",
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(call "vshll_n", $a1, (literal "int32_t", "0")))]>;
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def OP_COPY_LN : Op<(call "vset_lane", (call "vget_lane", $p2, $p3), $p0, $p1)>;
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def OP_SCALAR_MUL_LN : Op<(op "*", $p0, (call "vget_lane", $p1, $p2))>;
@@ -221,18 +221,18 @@ def OP_FMLSL_LN_Hi : Op<(call "vfmlsl_high", $p0, $p1,
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def OP_USDOT_LN
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: Op<(call "vusdot", $p0, $p1,
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- (cast "8", "S", (call_mangled "splat_lane", (bitcast "int32x2_t", $p2), $p3)))>;
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+ (bitcast "8", "S", (call_mangled "splat_lane", (bitcast "int32x2_t", $p2), $p3)))>;
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def OP_USDOT_LNQ
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: Op<(call "vusdot", $p0, $p1,
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- (cast "8", "S", (call_mangled "splat_lane", (bitcast "int32x4_t", $p2), $p3)))>;
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+ (bitcast "8", "S", (call_mangled "splat_lane", (bitcast "int32x4_t", $p2), $p3)))>;
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// sudot splats the second vector and then calls vusdot
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def OP_SUDOT_LN
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: Op<(call "vusdot", $p0,
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- (cast "8", "U", (call_mangled "splat_lane", (bitcast "int32x2_t", $p2), $p3)), $p1)>;
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+ (bitcast "8", "U", (call_mangled "splat_lane", (bitcast "int32x2_t", $p2), $p3)), $p1)>;
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def OP_SUDOT_LNQ
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: Op<(call "vusdot", $p0,
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- (cast "8", "U", (call_mangled "splat_lane", (bitcast "int32x4_t", $p2), $p3)), $p1)>;
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+ (bitcast "8", "U", (call_mangled "splat_lane", (bitcast "int32x4_t", $p2), $p3)), $p1)>;
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def OP_BFDOT_LN
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: Op<(call "vbfdot", $p0, $p1,
@@ -263,7 +263,7 @@ def OP_VCVT_BF16_F32_A32
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: Op<(call "__a32_vcvt_bf16", $p0)>;
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def OP_VCVT_BF16_F32_LO_A32
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- : Op<(call "vcombine", (cast "bfloat16x4_t", (literal "uint64_t", "0ULL")),
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+ : Op<(call "vcombine", (bitcast "bfloat16x4_t", (literal "uint64_t", "0ULL")),
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(call "__a32_vcvt_bf16", $p0))>;
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def OP_VCVT_BF16_F32_HI_A32
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: Op<(call "vcombine", (call "__a32_vcvt_bf16", $p1),
@@ -924,12 +924,12 @@ def CFMLE : SOpInst<"vcle", "U..", "lUldQdQlQUl", OP_LE>;
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def CFMGT : SOpInst<"vcgt", "U..", "lUldQdQlQUl", OP_GT>;
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def CFMLT : SOpInst<"vclt", "U..", "lUldQdQlQUl", OP_LT>;
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- def CMEQ : SInst<"vceqz", "U. ",
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+ def CMEQ : SInst<"vceqz", "U(.!) ",
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"csilfUcUsUiUlPcPlQcQsQiQlQfQUcQUsQUiQUlQPcdQdQPl">;
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- def CMGE : SInst<"vcgez", "U. ", "csilfdQcQsQiQlQfQd">;
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- def CMLE : SInst<"vclez", "U. ", "csilfdQcQsQiQlQfQd">;
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- def CMGT : SInst<"vcgtz", "U. ", "csilfdQcQsQiQlQfQd">;
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- def CMLT : SInst<"vcltz", "U. ", "csilfdQcQsQiQlQfQd">;
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+ def CMGE : SInst<"vcgez", "U(.!) ", "csilfdQcQsQiQlQfQd">;
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+ def CMLE : SInst<"vclez", "U(.!) ", "csilfdQcQsQiQlQfQd">;
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+ def CMGT : SInst<"vcgtz", "U(.!) ", "csilfdQcQsQiQlQfQd">;
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+ def CMLT : SInst<"vcltz", "U(.!) ", "csilfdQcQsQiQlQfQd">;
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////////////////////////////////////////////////////////////////////////////////
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// Max/Min Integer
@@ -1667,11 +1667,11 @@ let TargetGuard = "fullfp16,neon" in {
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// ARMv8.2-A FP16 one-operand vector intrinsics.
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// Comparison
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- def CMEQH : SInst<"vceqz", "U. ", "hQh">;
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- def CMGEH : SInst<"vcgez", "U. ", "hQh">;
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- def CMGTH : SInst<"vcgtz", "U. ", "hQh">;
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- def CMLEH : SInst<"vclez", "U. ", "hQh">;
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- def CMLTH : SInst<"vcltz", "U. ", "hQh">;
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+ def CMEQH : SInst<"vceqz", "U(.!) ", "hQh">;
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+ def CMGEH : SInst<"vcgez", "U(.!) ", "hQh">;
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+ def CMGTH : SInst<"vcgtz", "U(.!) ", "hQh">;
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+ def CMLEH : SInst<"vclez", "U(.!) ", "hQh">;
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+ def CMLTH : SInst<"vcltz", "U(.!) ", "hQh">;
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// Vector conversion
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def VCVT_F16 : SInst<"vcvt_f16", "F(.!)", "sUsQsQUs">;
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