Skip to content

Commit 8b1916b

Browse files
committed
[X86] Cleanup lowerShuffleWithUNPCK/PACK signatures to match (most) other lowerShuffle* methods. NFC.
1 parent 9e3e8b5 commit 8b1916b

File tree

1 file changed

+45
-44
lines changed

1 file changed

+45
-44
lines changed

llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 45 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -10005,8 +10005,8 @@ static bool matchShuffleWithUNPCK(MVT VT, SDValue &V1, SDValue &V2,
1000510005

1000610006
// X86 has dedicated unpack instructions that can handle specific blend
1000710007
// operations: UNPCKH and UNPCKL.
10008-
static SDValue lowerShuffleWithUNPCK(const SDLoc &DL, MVT VT,
10009-
ArrayRef<int> Mask, SDValue V1, SDValue V2,
10008+
static SDValue lowerShuffleWithUNPCK(const SDLoc &DL, MVT VT, SDValue V1,
10009+
SDValue V2, ArrayRef<int> Mask,
1001010010
SelectionDAG &DAG) {
1001110011
SmallVector<int, 8> Unpckl;
1001210012
createUnpackShuffleMask(VT, Unpckl, /* Lo = */ true, /* Unary = */ false);
@@ -10032,9 +10032,9 @@ static SDValue lowerShuffleWithUNPCK(const SDLoc &DL, MVT VT,
1003210032

1003310033
/// Check if the mask can be mapped to a preliminary shuffle (vperm 64-bit)
1003410034
/// followed by unpack 256-bit.
10035-
static SDValue lowerShuffleWithUNPCK256(const SDLoc &DL, MVT VT,
10036-
ArrayRef<int> Mask, SDValue V1,
10037-
SDValue V2, SelectionDAG &DAG) {
10035+
static SDValue lowerShuffleWithUNPCK256(const SDLoc &DL, MVT VT, SDValue V1,
10036+
SDValue V2, ArrayRef<int> Mask,
10037+
SelectionDAG &DAG) {
1003810038
SmallVector<int, 32> Unpckl, Unpckh;
1003910039
createSplat2ShuffleMask(VT, Unpckl, /* Lo */ true);
1004010040
createSplat2ShuffleMask(VT, Unpckh, /* Lo */ false);
@@ -10432,9 +10432,10 @@ static bool matchShuffleWithPACK(MVT VT, MVT &SrcVT, SDValue &V1, SDValue &V2,
1043210432
return false;
1043310433
}
1043410434

10435-
static SDValue lowerShuffleWithPACK(const SDLoc &DL, MVT VT, ArrayRef<int> Mask,
10436-
SDValue V1, SDValue V2, SelectionDAG &DAG,
10437-
const X86Subtarget &Subtarget) {
10435+
static SDValue lowerShuffleWithPACK(const SDLoc &DL, MVT VT, SDValue V1,
10436+
SDValue V2, ArrayRef<int> Mask,
10437+
const X86Subtarget &Subtarget,
10438+
SelectionDAG &DAG) {
1043810439
MVT PackVT;
1043910440
unsigned PackOpcode;
1044010441
unsigned SizeBits = VT.getSizeInBits();
@@ -12861,7 +12862,7 @@ static SDValue lowerV2F64Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1286112862
return Blend;
1286212863

1286312864
// Use dedicated unpack instructions for masks that match their pattern.
12864-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v2f64, Mask, V1, V2, DAG))
12865+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v2f64, V1, V2, Mask, DAG))
1286512866
return V;
1286612867

1286712868
unsigned SHUFPDMask = (Mask[0] == 1) | (((Mask[1] - 2) == 1) << 1);
@@ -12938,7 +12939,7 @@ static SDValue lowerV2I64Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1293812939
return Blend;
1293912940

1294012941
// Use dedicated unpack instructions for masks that match their pattern.
12941-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v2i64, Mask, V1, V2, DAG))
12942+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v2i64, V1, V2, Mask, DAG))
1294212943
return V;
1294312944

1294412945
// Try to use byte rotation instructions.
@@ -13160,7 +13161,7 @@ static SDValue lowerV4F32Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1316013161
}
1316113162

1316213163
// Use dedicated unpack instructions for masks that match their pattern.
13163-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v4f32, Mask, V1, V2, DAG))
13164+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v4f32, V1, V2, Mask, DAG))
1316413165
return V;
1316513166

1316613167
// Otherwise fall back to a SHUFPS lowering strategy.
@@ -13253,7 +13254,7 @@ static SDValue lowerV4I32Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1325313254
return Masked;
1325413255

1325513256
// Use dedicated unpack instructions for masks that match their pattern.
13256-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v4i32, Mask, V1, V2, DAG))
13257+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v4i32, V1, V2, Mask, DAG))
1325713258
return V;
1325813259

1325913260
// Try to use byte rotation instructions.
@@ -13908,12 +13909,12 @@ static SDValue lowerV8I16Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1390813909
return Rotate;
1390913910

1391013911
// Use dedicated unpack instructions for masks that match their pattern.
13911-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v8i16, Mask, V1, V2, DAG))
13912+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v8i16, V1, V2, Mask, DAG))
1391213913
return V;
1391313914

1391413915
// Use dedicated pack instructions for masks that match their pattern.
13915-
if (SDValue V = lowerShuffleWithPACK(DL, MVT::v8i16, Mask, V1, V2, DAG,
13916-
Subtarget))
13916+
if (SDValue V =
13917+
lowerShuffleWithPACK(DL, MVT::v8i16, V1, V2, Mask, Subtarget, DAG))
1391713918
return V;
1391813919

1391913920
// Try to use byte rotation instructions.
@@ -13962,12 +13963,12 @@ static SDValue lowerV8I16Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1396213963
return Masked;
1396313964

1396413965
// Use dedicated unpack instructions for masks that match their pattern.
13965-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v8i16, Mask, V1, V2, DAG))
13966+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v8i16, V1, V2, Mask, DAG))
1396613967
return V;
1396713968

1396813969
// Use dedicated pack instructions for masks that match their pattern.
13969-
if (SDValue V = lowerShuffleWithPACK(DL, MVT::v8i16, Mask, V1, V2, DAG,
13970-
Subtarget))
13970+
if (SDValue V =
13971+
lowerShuffleWithPACK(DL, MVT::v8i16, V1, V2, Mask, Subtarget, DAG))
1397113972
return V;
1397213973

1397313974
// Try to use lower using a truncation.
@@ -14168,8 +14169,8 @@ static SDValue lowerV16I8Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1416814169
return Rotate;
1416914170

1417014171
// Use dedicated pack instructions for masks that match their pattern.
14171-
if (SDValue V = lowerShuffleWithPACK(DL, MVT::v16i8, Mask, V1, V2, DAG,
14172-
Subtarget))
14172+
if (SDValue V =
14173+
lowerShuffleWithPACK(DL, MVT::v16i8, V1, V2, Mask, Subtarget, DAG))
1417314174
return V;
1417414175

1417514176
// Try to use a zext lowering.
@@ -14206,7 +14207,7 @@ static SDValue lowerV16I8Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1420614207
Subtarget, DAG))
1420714208
return Rotate;
1420814209

14209-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16i8, Mask, V1, V2, DAG))
14210+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16i8, V1, V2, Mask, DAG))
1421014211
return V;
1421114212

1421214213
// Check whether we can widen this to an i16 shuffle by duplicating bytes.
@@ -14310,7 +14311,7 @@ static SDValue lowerV16I8Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1431014311
return Masked;
1431114312

1431214313
// Use dedicated unpack instructions for masks that match their pattern.
14313-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16i8, Mask, V1, V2, DAG))
14314+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16i8, V1, V2, Mask, DAG))
1431414315
return V;
1431514316

1431614317
// Try to use byte shift instructions to mask.
@@ -15882,7 +15883,7 @@ static SDValue lowerV4F64Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1588215883
}
1588315884

1588415885
// Use dedicated unpack instructions for masks that match their pattern.
15885-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v4f64, Mask, V1, V2, DAG))
15886+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v4f64, V1, V2, Mask, DAG))
1588615887
return V;
1588715888

1588815889
if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v4f64, V1, V2, Mask,
@@ -16021,7 +16022,7 @@ static SDValue lowerV4I64Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1602116022
return Rotate;
1602216023

1602316024
// Use dedicated unpack instructions for masks that match their pattern.
16024-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v4i64, Mask, V1, V2, DAG))
16025+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v4i64, V1, V2, Mask, DAG))
1602516026
return V;
1602616027

1602716028
bool V1IsInPlace = isShuffleMaskInputInPlace(0, Mask);
@@ -16110,7 +16111,7 @@ static SDValue lowerV8F32Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1611016111
getV4X86ShuffleImm8ForMask(RepeatedMask, DL, DAG));
1611116112

1611216113
// Use dedicated unpack instructions for masks that match their pattern.
16113-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v8f32, Mask, V1, V2, DAG))
16114+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v8f32, V1, V2, Mask, DAG))
1611416115
return V;
1611516116

1611616117
// Otherwise, fall back to a SHUFPS sequence. Here it is important that we
@@ -16251,7 +16252,7 @@ static SDValue lowerV8I32Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1625116252
getV4X86ShuffleImm8ForMask(RepeatedMask, DL, DAG));
1625216253

1625316254
// Use dedicated unpack instructions for masks that match their pattern.
16254-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v8i32, Mask, V1, V2, DAG))
16255+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v8i32, V1, V2, Mask, DAG))
1625516256
return V;
1625616257
}
1625716258

@@ -16291,7 +16292,7 @@ static SDValue lowerV8I32Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1629116292
if (V2.isUndef()) {
1629216293
// Try to produce a fixed cross-128-bit lane permute followed by unpack
1629316294
// because that should be faster than the variable permute alternatives.
16294-
if (SDValue V = lowerShuffleWithUNPCK256(DL, MVT::v8i32, Mask, V1, V2, DAG))
16295+
if (SDValue V = lowerShuffleWithUNPCK256(DL, MVT::v8i32, V1, V2, Mask, DAG))
1629516296
return V;
1629616297

1629716298
// If the shuffle patterns aren't repeated but it's a single input, directly
@@ -16352,12 +16353,12 @@ static SDValue lowerV16I16Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1635216353
return Blend;
1635316354

1635416355
// Use dedicated unpack instructions for masks that match their pattern.
16355-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16i16, Mask, V1, V2, DAG))
16356+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16i16, V1, V2, Mask, DAG))
1635616357
return V;
1635716358

1635816359
// Use dedicated pack instructions for masks that match their pattern.
16359-
if (SDValue V = lowerShuffleWithPACK(DL, MVT::v16i16, Mask, V1, V2, DAG,
16360-
Subtarget))
16360+
if (SDValue V =
16361+
lowerShuffleWithPACK(DL, MVT::v16i16, V1, V2, Mask, Subtarget, DAG))
1636116362
return V;
1636216363

1636316364
// Try to use lower using a truncation.
@@ -16390,7 +16391,7 @@ static SDValue lowerV16I16Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1639016391

1639116392
// Try to produce a fixed cross-128-bit lane permute followed by unpack
1639216393
// because that should be faster than the variable permute alternatives.
16393-
if (SDValue V = lowerShuffleWithUNPCK256(DL, MVT::v16i16, Mask, V1, V2, DAG))
16394+
if (SDValue V = lowerShuffleWithUNPCK256(DL, MVT::v16i16, V1, V2, Mask, DAG))
1639416395
return V;
1639516396

1639616397
// There are no generalized cross-lane shuffle operations available on i16
@@ -16475,12 +16476,12 @@ static SDValue lowerV32I8Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1647516476
return Blend;
1647616477

1647716478
// Use dedicated unpack instructions for masks that match their pattern.
16478-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v32i8, Mask, V1, V2, DAG))
16479+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v32i8, V1, V2, Mask, DAG))
1647916480
return V;
1648016481

1648116482
// Use dedicated pack instructions for masks that match their pattern.
16482-
if (SDValue V = lowerShuffleWithPACK(DL, MVT::v32i8, Mask, V1, V2, DAG,
16483-
Subtarget))
16483+
if (SDValue V =
16484+
lowerShuffleWithPACK(DL, MVT::v32i8, V1, V2, Mask, Subtarget, DAG))
1648416485
return V;
1648516486

1648616487
// Try to use lower using a truncation.
@@ -16516,7 +16517,7 @@ static SDValue lowerV32I8Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1651616517
if (V2.isUndef() && is128BitLaneCrossingShuffleMask(MVT::v32i8, Mask)) {
1651716518
// Try to produce a fixed cross-128-bit lane permute followed by unpack
1651816519
// because that should be faster than the variable permute alternatives.
16519-
if (SDValue V = lowerShuffleWithUNPCK256(DL, MVT::v32i8, Mask, V1, V2, DAG))
16520+
if (SDValue V = lowerShuffleWithUNPCK256(DL, MVT::v32i8, V1, V2, Mask, DAG))
1652016521
return V;
1652116522

1652216523
if (SDValue V = lowerShuffleAsLanePermuteAndPermute(
@@ -16783,7 +16784,7 @@ static SDValue lowerV8F64Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1678316784
V2, Subtarget, DAG))
1678416785
return Shuf128;
1678516786

16786-
if (SDValue Unpck = lowerShuffleWithUNPCK(DL, MVT::v8f64, Mask, V1, V2, DAG))
16787+
if (SDValue Unpck = lowerShuffleWithUNPCK(DL, MVT::v8f64, V1, V2, Mask, DAG))
1678716788
return Unpck;
1678816789

1678916790
// Check if the blend happens to exactly fit that of SHUFPD.
@@ -16828,7 +16829,7 @@ static SDValue lowerV16F32Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1682816829
getV4X86ShuffleImm8ForMask(RepeatedMask, DL, DAG));
1682916830

1683016831
// Use dedicated unpack instructions for masks that match their pattern.
16831-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16f32, Mask, V1, V2, DAG))
16832+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16f32, V1, V2, Mask, DAG))
1683216833
return V;
1683316834

1683416835
if (SDValue Blend = lowerShuffleAsBlend(DL, MVT::v16f32, V1, V2, Mask,
@@ -16927,7 +16928,7 @@ static SDValue lowerV8I64Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1692716928
Subtarget, DAG))
1692816929
return Rotate;
1692916930

16930-
if (SDValue Unpck = lowerShuffleWithUNPCK(DL, MVT::v8i64, Mask, V1, V2, DAG))
16931+
if (SDValue Unpck = lowerShuffleWithUNPCK(DL, MVT::v8i64, V1, V2, Mask, DAG))
1693116932
return Unpck;
1693216933

1693316934
// If we have AVX512F support, we can use VEXPAND.
@@ -16985,7 +16986,7 @@ static SDValue lowerV16I32Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1698516986
getV4X86ShuffleImm8ForMask(RepeatedMask, DL, DAG));
1698616987

1698716988
// Use dedicated unpack instructions for masks that match their pattern.
16988-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16i32, Mask, V1, V2, DAG))
16989+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v16i32, V1, V2, Mask, DAG))
1698916990
return V;
1699016991
}
1699116992

@@ -17057,12 +17058,12 @@ static SDValue lowerV32I16Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1705717058
return ZExt;
1705817059

1705917060
// Use dedicated unpack instructions for masks that match their pattern.
17060-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v32i16, Mask, V1, V2, DAG))
17061+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v32i16, V1, V2, Mask, DAG))
1706117062
return V;
1706217063

1706317064
// Use dedicated pack instructions for masks that match their pattern.
1706417065
if (SDValue V =
17065-
lowerShuffleWithPACK(DL, MVT::v32i16, Mask, V1, V2, DAG, Subtarget))
17066+
lowerShuffleWithPACK(DL, MVT::v32i16, V1, V2, Mask, Subtarget, DAG))
1706617067
return V;
1706717068

1706817069
// Try to use shift instructions.
@@ -17121,12 +17122,12 @@ static SDValue lowerV64I8Shuffle(const SDLoc &DL, ArrayRef<int> Mask,
1712117122
return ZExt;
1712217123

1712317124
// Use dedicated unpack instructions for masks that match their pattern.
17124-
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v64i8, Mask, V1, V2, DAG))
17125+
if (SDValue V = lowerShuffleWithUNPCK(DL, MVT::v64i8, V1, V2, Mask, DAG))
1712517126
return V;
1712617127

1712717128
// Use dedicated pack instructions for masks that match their pattern.
17128-
if (SDValue V = lowerShuffleWithPACK(DL, MVT::v64i8, Mask, V1, V2, DAG,
17129-
Subtarget))
17129+
if (SDValue V =
17130+
lowerShuffleWithPACK(DL, MVT::v64i8, V1, V2, Mask, Subtarget, DAG))
1713017131
return V;
1713117132

1713217133
// Try to use shift instructions.

0 commit comments

Comments
 (0)