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GlobalISel: Regenerate test checks
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4 files changed

+115
-82
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4 files changed

+115
-82
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‎llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll

Lines changed: 48 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -8,10 +8,11 @@ declare void @test_explicit_sret(ptr sret(i64))
88
define void @can_tail_call_forwarded_explicit_sret_ptr(ptr sret(i64) %arg) {
99
; CHECK-LABEL: name: can_tail_call_forwarded_explicit_sret_ptr
1010
; CHECK: bb.1 (%ir-block.0):
11-
; CHECK: liveins: $x8
12-
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x8
13-
; CHECK: $x8 = COPY [[COPY]](p0)
14-
; CHECK: TCRETURNdi @test_explicit_sret, 0, csr_darwin_aarch64_aapcs, implicit $sp, implicit $x8
11+
; CHECK-NEXT: liveins: $x8
12+
; CHECK-NEXT: {{ $}}
13+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x8
14+
; CHECK-NEXT: $x8 = COPY [[COPY]](p0)
15+
; CHECK-NEXT: TCRETURNdi @test_explicit_sret, 0, csr_darwin_aarch64_aapcs, implicit $sp, implicit $x8
1516
tail call void @test_explicit_sret(ptr %arg)
1617
ret void
1718
}
@@ -20,26 +21,27 @@ define void @can_tail_call_forwarded_explicit_sret_ptr(ptr sret(i64) %arg) {
2021
define void @test_call_explicit_sret(ptr sret(i64) %arg) {
2122
; CHECK-LABEL: name: test_call_explicit_sret
2223
; CHECK: bb.1 (%ir-block.0):
23-
; CHECK: liveins: $x8
24-
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x8
25-
; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
26-
; CHECK: $x8 = COPY [[COPY]](p0)
27-
; CHECK: BL @test_explicit_sret, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x8
28-
; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
29-
; CHECK: RET_ReallyLR
24+
; CHECK-NEXT: liveins: $x8
25+
; CHECK-NEXT: {{ $}}
26+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x8
27+
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
28+
; CHECK-NEXT: $x8 = COPY [[COPY]](p0)
29+
; CHECK-NEXT: BL @test_explicit_sret, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x8
30+
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
31+
; CHECK-NEXT: RET_ReallyLR
3032
call void @test_explicit_sret(ptr %arg)
3133
ret void
3234
}
3335

3436
define void @dont_tail_call_explicit_sret_alloca_unused() {
3537
; CHECK-LABEL: name: dont_tail_call_explicit_sret_alloca_unused
3638
; CHECK: bb.1 (%ir-block.0):
37-
; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.l
38-
; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
39-
; CHECK: $x8 = COPY [[FRAME_INDEX]](p0)
40-
; CHECK: BL @test_explicit_sret, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x8
41-
; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
42-
; CHECK: RET_ReallyLR
39+
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.l
40+
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
41+
; CHECK-NEXT: $x8 = COPY [[FRAME_INDEX]](p0)
42+
; CHECK-NEXT: BL @test_explicit_sret, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x8
43+
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
44+
; CHECK-NEXT: RET_ReallyLR
4345
%l = alloca i64, align 8
4446
tail call void @test_explicit_sret(ptr %l)
4547
ret void
@@ -48,16 +50,17 @@ define void @dont_tail_call_explicit_sret_alloca_unused() {
4850
define void @dont_tail_call_explicit_sret_alloca_dummyusers(ptr %ptr) {
4951
; CHECK-LABEL: name: dont_tail_call_explicit_sret_alloca_dummyusers
5052
; CHECK: bb.1 (%ir-block.0):
51-
; CHECK: liveins: $x0
52-
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
53-
; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.l
54-
; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load (s64) from %ir.ptr)
55-
; CHECK: G_STORE [[LOAD]](s64), [[FRAME_INDEX]](p0) :: (store (s64) into %ir.l)
56-
; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
57-
; CHECK: $x8 = COPY [[FRAME_INDEX]](p0)
58-
; CHECK: BL @test_explicit_sret, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x8
59-
; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
60-
; CHECK: RET_ReallyLR
53+
; CHECK-NEXT: liveins: $x0
54+
; CHECK-NEXT: {{ $}}
55+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
56+
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.l
57+
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[COPY]](p0) :: (load (s64) from %ir.ptr)
58+
; CHECK-NEXT: G_STORE [[LOAD]](s64), [[FRAME_INDEX]](p0) :: (store (s64) into %ir.l)
59+
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
60+
; CHECK-NEXT: $x8 = COPY [[FRAME_INDEX]](p0)
61+
; CHECK-NEXT: BL @test_explicit_sret, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x8
62+
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
63+
; CHECK-NEXT: RET_ReallyLR
6164
%l = alloca i64, align 8
6265
%r = load i64, ptr %ptr, align 8
6366
store i64 %r, ptr %l, align 8
@@ -68,15 +71,16 @@ define void @dont_tail_call_explicit_sret_alloca_dummyusers(ptr %ptr) {
6871
define void @dont_tail_call_tailcall_explicit_sret_gep(ptr %ptr) {
6972
; CHECK-LABEL: name: dont_tail_call_tailcall_explicit_sret_gep
7073
; CHECK: bb.1 (%ir-block.0):
71-
; CHECK: liveins: $x0
72-
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
73-
; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
74-
; CHECK: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
75-
; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
76-
; CHECK: $x8 = COPY [[PTR_ADD]](p0)
77-
; CHECK: BL @test_explicit_sret, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x8
78-
; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
79-
; CHECK: RET_ReallyLR
74+
; CHECK-NEXT: liveins: $x0
75+
; CHECK-NEXT: {{ $}}
76+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
77+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
78+
; CHECK-NEXT: [[PTR_ADD:%[0-9]+]]:_(p0) = G_PTR_ADD [[COPY]], [[C]](s64)
79+
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
80+
; CHECK-NEXT: $x8 = COPY [[PTR_ADD]](p0)
81+
; CHECK-NEXT: BL @test_explicit_sret, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x8
82+
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
83+
; CHECK-NEXT: RET_ReallyLR
8084
%ptr2 = getelementptr i64, ptr %ptr, i32 1
8185
tail call void @test_explicit_sret(ptr %ptr2)
8286
ret void
@@ -85,14 +89,14 @@ define void @dont_tail_call_tailcall_explicit_sret_gep(ptr %ptr) {
8589
define i64 @dont_tail_call_sret_alloca_returned() {
8690
; CHECK-LABEL: name: dont_tail_call_sret_alloca_returned
8791
; CHECK: bb.1 (%ir-block.0):
88-
; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.l
89-
; CHECK: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
90-
; CHECK: $x8 = COPY [[FRAME_INDEX]](p0)
91-
; CHECK: BL @test_explicit_sret, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x8
92-
; CHECK: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
93-
; CHECK: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s64) from %ir.l)
94-
; CHECK: $x0 = COPY [[LOAD]](s64)
95-
; CHECK: RET_ReallyLR implicit $x0
92+
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.l
93+
; CHECK-NEXT: ADJCALLSTACKDOWN 0, 0, implicit-def $sp, implicit $sp
94+
; CHECK-NEXT: $x8 = COPY [[FRAME_INDEX]](p0)
95+
; CHECK-NEXT: BL @test_explicit_sret, csr_darwin_aarch64_aapcs, implicit-def $lr, implicit $sp, implicit $x8
96+
; CHECK-NEXT: ADJCALLSTACKUP 0, 0, implicit-def $sp, implicit $sp
97+
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s64) = G_LOAD [[FRAME_INDEX]](p0) :: (dereferenceable load (s64) from %ir.l)
98+
; CHECK-NEXT: $x0 = COPY [[LOAD]](s64)
99+
; CHECK-NEXT: RET_ReallyLR implicit $x0
96100
%l = alloca i64, align 8
97101
tail call void @test_explicit_sret(ptr %l)
98102
%r = load i64, ptr %l, align 8

‎llvm/test/CodeGen/AArch64/GlobalISel/constant-dbg-loc.ll

Lines changed: 23 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -10,24 +10,29 @@ target triple = "arm64-apple-ios5.0.0"
1010
define i32 @main() #0 !dbg !14 {
1111
; CHECK-LABEL: name: main
1212
; CHECK: bb.1.entry:
13-
; CHECK: successors: %bb.2(0x40000000), %bb.3(0x40000000)
14-
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
15-
; CHECK: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var1
16-
; CHECK: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
17-
; CHECK: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
18-
; CHECK: [[GV1:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var2
19-
; CHECK: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.retval
20-
; CHECK: G_STORE [[C]](s32), [[FRAME_INDEX]](p0) :: (store (s32) into %ir.retval)
21-
; CHECK: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GV]](p0), debug-location !17 :: (dereferenceable load (s32) from @var1)
22-
; CHECK: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[LOAD]](s32), [[C1]], debug-location !19
23-
; CHECK: G_BRCOND [[ICMP]](s1), %bb.2, debug-location !20
24-
; CHECK: G_BR %bb.3, debug-location !20
25-
; CHECK: bb.2.if.then:
26-
; CHECK: successors: %bb.3(0x80000000)
27-
; CHECK: G_STORE [[C2]](s32), [[GV1]](p0), debug-location !21 :: (store (s32) into @var2)
28-
; CHECK: bb.3.if.end:
29-
; CHECK: $w0 = COPY [[C]](s32), debug-location !24
30-
; CHECK: RET_ReallyLR implicit $w0, debug-location !24
13+
; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.3(0x40000000)
14+
; CHECK-NEXT: {{ $}}
15+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
16+
; CHECK-NEXT: [[GV:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var1
17+
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
18+
; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
19+
; CHECK-NEXT: [[GV1:%[0-9]+]]:_(p0) = G_GLOBAL_VALUE @var2
20+
; CHECK-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %stack.0.retval
21+
; CHECK-NEXT: G_STORE [[C]](s32), [[FRAME_INDEX]](p0) :: (store (s32) into %ir.retval)
22+
; CHECK-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GV]](p0), debug-location !17 :: (dereferenceable load (s32) from @var1)
23+
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(eq), [[LOAD]](s32), [[C1]], debug-location !19
24+
; CHECK-NEXT: G_BRCOND [[ICMP]](s1), %bb.2, debug-location !20
25+
; CHECK-NEXT: G_BR %bb.3, debug-location !20
26+
; CHECK-NEXT: {{ $}}
27+
; CHECK-NEXT: bb.2.if.then:
28+
; CHECK-NEXT: successors: %bb.3(0x80000000)
29+
; CHECK-NEXT: {{ $}}
30+
; CHECK-NEXT: G_STORE [[C2]](s32), [[GV1]](p0), debug-location !21 :: (store (s32) into @var2)
31+
; CHECK-NEXT: G_BR %bb.3, debug-location !23
32+
; CHECK-NEXT: {{ $}}
33+
; CHECK-NEXT: bb.3.if.end:
34+
; CHECK-NEXT: $w0 = COPY [[C]](s32), debug-location !24
35+
; CHECK-NEXT: RET_ReallyLR implicit $w0, debug-location !24
3136
entry:
3237
%retval = alloca i32, align 4
3338
store i32 0, ptr %retval, align 4

‎llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-store-metadata.ll

Lines changed: 24 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -4,47 +4,51 @@
44
define void @store_nontemporal(ptr dereferenceable(4) %ptr) {
55
; CHECK-LABEL: name: store_nontemporal
66
; CHECK: bb.1 (%ir-block.0):
7-
; CHECK: liveins: $x0
8-
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
9-
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
10-
; CHECK: G_STORE [[C]](s32), [[COPY]](p0) :: (non-temporal store (s32) into %ir.ptr)
11-
; CHECK: RET_ReallyLR
7+
; CHECK-NEXT: liveins: $x0
8+
; CHECK-NEXT: {{ $}}
9+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
10+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
11+
; CHECK-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: (non-temporal store (s32) into %ir.ptr)
12+
; CHECK-NEXT: RET_ReallyLR
1213
store i32 0, ptr %ptr, align 4, !nontemporal !0
1314
ret void
1415
}
1516

1617
define void @store_dereferenceable(ptr dereferenceable(4) %ptr) {
1718
; CHECK-LABEL: name: store_dereferenceable
1819
; CHECK: bb.1 (%ir-block.0):
19-
; CHECK: liveins: $x0
20-
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
21-
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
22-
; CHECK: G_STORE [[C]](s32), [[COPY]](p0) :: (store (s32) into %ir.ptr)
23-
; CHECK: RET_ReallyLR
20+
; CHECK-NEXT: liveins: $x0
21+
; CHECK-NEXT: {{ $}}
22+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
23+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
24+
; CHECK-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: (store (s32) into %ir.ptr)
25+
; CHECK-NEXT: RET_ReallyLR
2426
store i32 0, ptr %ptr, align 4
2527
ret void
2628
}
2729

2830
define void @store_volatile_dereferenceable(ptr dereferenceable(4) %ptr) {
2931
; CHECK-LABEL: name: store_volatile_dereferenceable
3032
; CHECK: bb.1 (%ir-block.0):
31-
; CHECK: liveins: $x0
32-
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
33-
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
34-
; CHECK: G_STORE [[C]](s32), [[COPY]](p0) :: (volatile store (s32) into %ir.ptr)
35-
; CHECK: RET_ReallyLR
33+
; CHECK-NEXT: liveins: $x0
34+
; CHECK-NEXT: {{ $}}
35+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
36+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
37+
; CHECK-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: (volatile store (s32) into %ir.ptr)
38+
; CHECK-NEXT: RET_ReallyLR
3639
store volatile i32 0, ptr %ptr, align 4
3740
ret void
3841
}
3942

4043
define void @store_falkor_strided_access(ptr %ptr) {
4144
; CHECK-LABEL: name: store_falkor_strided_access
4245
; CHECK: bb.1 (%ir-block.0):
43-
; CHECK: liveins: $x0
44-
; CHECK: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
45-
; CHECK: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
46-
; CHECK: G_STORE [[C]](s32), [[COPY]](p0) :: ("aarch64-strided-access" store (s32) into %ir.ptr)
47-
; CHECK: RET_ReallyLR
46+
; CHECK-NEXT: liveins: $x0
47+
; CHECK-NEXT: {{ $}}
48+
; CHECK-NEXT: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
49+
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
50+
; CHECK-NEXT: G_STORE [[C]](s32), [[COPY]](p0) :: ("aarch64-strided-access" store (s32) into %ir.ptr)
51+
; CHECK-NEXT: RET_ReallyLR
4852
store i32 0, ptr %ptr, align 4, !falkor.strided.access !0
4953
ret void
5054
}

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