@@ -1338,19 +1338,18 @@ RISCVTargetLowering::RISCVTargetLowering(const TargetMachine &TM,
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ISD::VECTOR_COMPRESS},
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VT, Custom);
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- // FIXME: mload, mstore, mgather, mscatter, vp_load/store,
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- // vp_stride_load/store, vp_gather/scatter can be hoisted to here.
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+ // FIXME: mload, mstore, mgather, mscatter, vp_gather/scatter can be
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+ // hoisted to here.
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setOperationAction({ISD::LOAD, ISD::STORE}, VT, Custom);
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- setOperationAction({ISD::VP_LOAD, ISD::VP_STORE}, VT, Custom);
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+ setOperationAction({ISD::VP_LOAD, ISD::VP_STORE,
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+ ISD::EXPERIMENTAL_VP_STRIDED_LOAD,
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+ ISD::EXPERIMENTAL_VP_STRIDED_STORE},
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+ VT, Custom);
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setOperationAction({ISD::FP_ROUND, ISD::FP_EXTEND}, VT, Custom);
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setOperationAction({ISD::STRICT_FP_ROUND, ISD::STRICT_FP_EXTEND}, VT,
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Custom);
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- setOperationAction({ISD::EXPERIMENTAL_VP_STRIDED_LOAD,
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- ISD::EXPERIMENTAL_VP_STRIDED_STORE},
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- VT, Custom);
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-
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if (VT.getVectorElementType() == MVT::f16 &&
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!Subtarget.hasVInstructionsF16()) {
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setOperationAction(ISD::BITCAST, VT, Custom);
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