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[VectorCombine] Add test coverage for shuffle(cmp,cmp) fold patterns
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‎llvm/test/Transforms/VectorCombine/X86/shuffle-of-cmps.ll

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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4
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; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- -mattr=sse2 | FileCheck %s --check-prefixes=CHECK
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; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- -mattr=sse4.2 | FileCheck %s --check-prefixes=CHECK
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; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- -mattr=avx2 | FileCheck %s --check-prefixes=CHECK
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; RUN: opt < %s -passes=vector-combine -S -mtriple=x86_64-- -mattr=avx512vl | FileCheck %s --check-prefixes=CHECK
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declare void @use(<4 x i1>)
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; icmp - eq v4i32 is cheap
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define <4 x i32> @shuf_icmp_eq_v4i32(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z, <4 x i32> %w) {
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; CHECK-LABEL: define <4 x i32> @shuf_icmp_eq_v4i32(
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; CHECK-SAME: <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> [[Z:%.*]], <4 x i32> [[W:%.*]]) #[[ATTR0:[0-9]+]] {
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; CHECK-NEXT: [[C0:%.*]] = icmp eq <4 x i32> [[X]], [[Y]]
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; CHECK-NEXT: [[C1:%.*]] = icmp eq <4 x i32> [[Z]], [[W]]
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; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i1> [[C0]], <4 x i1> [[C1]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[S]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%c0 = icmp eq <4 x i32> %x, %y
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%c1 = icmp eq <4 x i32> %z, %w
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%s = shufflevector <4 x i1> %c0, <4 x i1> %c1, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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%r = sext <4 x i1> %s to <4 x i32>
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ret <4 x i32> %r
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}
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; icmp - eq v2i64 is only cheap on SSE4+ targets with PCMPEQQ
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define <2 x i64> @shuf_icmp_eq_v2i64(<2 x i64> %x, <2 x i64> %y, <2 x i64> %z, <2 x i64> %w) {
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; CHECK-LABEL: define <2 x i64> @shuf_icmp_eq_v2i64(
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; CHECK-SAME: <2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], <2 x i64> [[Z:%.*]], <2 x i64> [[W:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[C0:%.*]] = icmp eq <2 x i64> [[X]], [[Y]]
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; CHECK-NEXT: [[C1:%.*]] = icmp eq <2 x i64> [[Z]], [[W]]
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; CHECK-NEXT: [[S:%.*]] = shufflevector <2 x i1> [[C0]], <2 x i1> [[C1]], <2 x i32> <i32 1, i32 3>
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; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[S]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[R]]
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;
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%c0 = icmp eq <2 x i64> %x, %y
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%c1 = icmp eq <2 x i64> %z, %w
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%s = shufflevector <2 x i1> %c0, <2 x i1> %c1, <2 x i32> <i32 1, i32 3>
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%r = sext <2 x i1> %s to <2 x i64>
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ret <2 x i64> %r
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}
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; icmp - ugt v4i32 is expensive
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define <4 x i32> @shuf_icmp_ugt_v4i32(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z, <4 x i32> %w) {
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; CHECK-LABEL: define <4 x i32> @shuf_icmp_ugt_v4i32(
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; CHECK-SAME: <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> [[Z:%.*]], <4 x i32> [[W:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[C0:%.*]] = icmp ugt <4 x i32> [[X]], [[Y]]
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; CHECK-NEXT: [[C1:%.*]] = icmp ugt <4 x i32> [[Z]], [[W]]
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; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i1> [[C0]], <4 x i1> [[C1]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[S]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%c0 = icmp ugt <4 x i32> %x, %y
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%c1 = icmp ugt <4 x i32> %z, %w
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%s = shufflevector <4 x i1> %c0, <4 x i1> %c1, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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%r = sext <4 x i1> %s to <4 x i32>
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ret <4 x i32> %r
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}
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; Common operand is op0 of the fcmps.
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define <4 x i32> @shuf_fcmp_oeq_v4i32(<4 x float> %x, <4 x float> %y, <4 x float> %z) {
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; CHECK-LABEL: define <4 x i32> @shuf_fcmp_oeq_v4i32(
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; CHECK-SAME: <4 x float> [[X:%.*]], <4 x float> [[Y:%.*]], <4 x float> [[Z:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[B0:%.*]] = fcmp oeq <4 x float> [[X]], [[Y]]
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; CHECK-NEXT: [[B1:%.*]] = fcmp oeq <4 x float> [[X]], [[Z]]
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; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i1> [[B0]], <4 x i1> [[B1]], <4 x i32> <i32 poison, i32 poison, i32 6, i32 0>
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; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[S]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%b0 = fcmp oeq <4 x float> %x, %y
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%b1 = fcmp oeq <4 x float> %x, %z
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%s = shufflevector <4 x i1> %b0, <4 x i1> %b1, <4 x i32> <i32 poison, i32 poison, i32 6, i32 0>
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%r = sext <4 x i1> %s to <4 x i32>
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ret <4 x i32> %r
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}
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; For commutative instructions, common operand may be swapped
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define <4 x i32> @shuf_fcmp_one_v4f32_swap(<4 x float> %x, <4 x float> %y, <4 x float> %z) {
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; CHECK-LABEL: define <4 x i32> @shuf_fcmp_one_v4f32_swap(
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; CHECK-SAME: <4 x float> [[X:%.*]], <4 x float> [[Y:%.*]], <4 x float> [[Z:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[B0:%.*]] = fcmp one <4 x float> [[X]], [[Y]]
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; CHECK-NEXT: [[B1:%.*]] = fcmp one <4 x float> [[Z]], [[X]]
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; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i1> [[B0]], <4 x i1> [[B1]], <4 x i32> <i32 0, i32 3, i32 4, i32 7>
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; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[S]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%b0 = fcmp one <4 x float> %x, %y
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%b1 = fcmp one <4 x float> %z, %x
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%s = shufflevector <4 x i1> %b0, <4 x i1> %b1, <4 x i32> <i32 0, i32 3, i32 4, i32 7>
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%r = sext <4 x i1> %s to <4 x i32>
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ret <4 x i32> %r
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}
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; non-commutative pred, but common op0
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define <4 x i32> @shuf_icmp_sgt_v4i32_swap(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z) {
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; CHECK-LABEL: define <4 x i32> @shuf_icmp_sgt_v4i32_swap(
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; CHECK-SAME: <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> [[Z:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[B0:%.*]] = icmp sgt <4 x i32> [[X]], [[Y]]
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; CHECK-NEXT: [[B1:%.*]] = icmp sgt <4 x i32> [[X]], [[Z]]
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; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i1> [[B0]], <4 x i1> [[B1]], <4 x i32> <i32 3, i32 1, i32 1, i32 6>
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; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[S]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%b0 = icmp sgt <4 x i32> %x, %y
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%b1 = icmp sgt <4 x i32> %x, %z
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%s = shufflevector <4 x i1> %b0, <4 x i1> %b1, <4 x i32> <i32 3, i32 1, i32 1, i32 6>
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%r = sext <4 x i1> %s to <4 x i32>
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ret <4 x i32> %r
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}
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; negative test - mismatched opcodes
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define <2 x i64> @shuf_icmp_fcmp_v2i64_mismatch_opcode(<2 x i64> %x, <2 x i64> %y, <2 x double> %z, <2 x double> %w) {
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; CHECK-LABEL: define <2 x i64> @shuf_icmp_fcmp_v2i64_mismatch_opcode(
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; CHECK-SAME: <2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], <2 x double> [[Z:%.*]], <2 x double> [[W:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[B0:%.*]] = icmp eq <2 x i64> [[X]], [[Y]]
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; CHECK-NEXT: [[B1:%.*]] = fcmp oeq <2 x double> [[Z]], [[W]]
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; CHECK-NEXT: [[S:%.*]] = shufflevector <2 x i1> [[B0]], <2 x i1> [[B1]], <2 x i32> <i32 3, i32 0>
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; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[S]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[R]]
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;
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%b0 = icmp eq <2 x i64> %x, %y
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%b1 = fcmp oeq <2 x double> %z, %w
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%s = shufflevector <2 x i1> %b0, <2 x i1> %b1, <2 x i32> <i32 3, i32 0>
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%r = sext <2 x i1> %s to <2 x i64>
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ret <2 x i64> %r
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}
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; negative test - mismatched predicates
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define <2 x i64> @shuf_icmp_eq_sgt_v2i64_mismatch_predicate(<2 x i64> %x, <2 x i64> %y, <2 x i64> %z) {
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; CHECK-LABEL: define <2 x i64> @shuf_icmp_eq_sgt_v2i64_mismatch_predicate(
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; CHECK-SAME: <2 x i64> [[X:%.*]], <2 x i64> [[Y:%.*]], <2 x i64> [[Z:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[B0:%.*]] = icmp eq <2 x i64> [[X]], [[Y]]
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; CHECK-NEXT: [[B1:%.*]] = icmp sgt <2 x i64> [[Z]], [[Y]]
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; CHECK-NEXT: [[S:%.*]] = shufflevector <2 x i1> [[B0]], <2 x i1> [[B1]], <2 x i32> <i32 3, i32 0>
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; CHECK-NEXT: [[R:%.*]] = sext <2 x i1> [[S]] to <2 x i64>
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; CHECK-NEXT: ret <2 x i64> [[R]]
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;
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%b0 = icmp eq <2 x i64> %x, %y
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%b1 = icmp sgt <2 x i64> %z, %y
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%s = shufflevector <2 x i1> %b0, <2 x i1> %b1, <2 x i32> <i32 3, i32 0>
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%r = sext <2 x i1> %s to <2 x i64>
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ret <2 x i64> %r
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}
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; negative test - mismatched types
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define <4 x i32> @shuf_icmp_eq_v4i64_v4i32_mismatch_type(<4 x i64> %x, <4 x i64> %y, <4 x i32> %z, <4 x i32> %w) {
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; CHECK-LABEL: define <4 x i32> @shuf_icmp_eq_v4i64_v4i32_mismatch_type(
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; CHECK-SAME: <4 x i64> [[X:%.*]], <4 x i64> [[Y:%.*]], <4 x i32> [[Z:%.*]], <4 x i32> [[W:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[B0:%.*]] = icmp eq <4 x i64> [[X]], [[Y]]
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; CHECK-NEXT: [[B1:%.*]] = icmp eq <4 x i32> [[Z]], [[W]]
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; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i1> [[B0]], <4 x i1> [[B1]], <4 x i32> <i32 3, i32 1, i32 1, i32 6>
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; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[S]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%b0 = icmp eq <4 x i64> %x, %y
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%b1 = icmp eq <4 x i32> %z, %w
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%s = shufflevector <4 x i1> %b0, <4 x i1> %b1, <4 x i32> <i32 3, i32 1, i32 1, i32 6>
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%r = sext <4 x i1> %s to <4 x i32>
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ret <4 x i32> %r
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}
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; negative test - uses
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define <4 x i32> @shuf_icmp_ugt_v4i32_use(<4 x i32> %x, <4 x i32> %y, <4 x i32> %z, <4 x i32> %w) {
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; CHECK-LABEL: define <4 x i32> @shuf_icmp_ugt_v4i32_use(
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; CHECK-SAME: <4 x i32> [[X:%.*]], <4 x i32> [[Y:%.*]], <4 x i32> [[Z:%.*]], <4 x i32> [[W:%.*]]) #[[ATTR0]] {
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; CHECK-NEXT: [[C0:%.*]] = icmp ugt <4 x i32> [[X]], [[Y]]
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; CHECK-NEXT: [[C1:%.*]] = icmp ugt <4 x i32> [[Z]], [[W]]
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; CHECK-NEXT: call void @use(<4 x i1> [[C0]])
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; CHECK-NEXT: [[S:%.*]] = shufflevector <4 x i1> [[C0]], <4 x i1> [[C1]], <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[S]] to <4 x i32>
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; CHECK-NEXT: ret <4 x i32> [[R]]
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;
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%c0 = icmp ugt <4 x i32> %x, %y
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%c1 = icmp ugt <4 x i32> %z, %w
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call void @use(<4 x i1> %c0)
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%s = shufflevector <4 x i1> %c0, <4 x i1> %c1, <4 x i32> <i32 1, i32 3, i32 5, i32 7>
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%r = sext <4 x i1> %s to <4 x i32>
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ret <4 x i32> %r
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}

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