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1 parent bc45547 commit 8dff57aCopy full SHA for 8dff57a
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -2985,8 +2985,6 @@ bool SelectionDAGLegalize::ExpandNode(SDNode *Node) {
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// NOTE: we could fall back on load/store here too for targets without
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// SRA. However, it is doubtful that any exist.
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EVT ShiftAmountTy = TLI.getShiftAmountTy(VT, DAG.getDataLayout());
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- if (VT.isVector())
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- ShiftAmountTy = VT;
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unsigned BitsDiff = VT.getScalarSizeInBits() -
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ExtraVT.getScalarSizeInBits();
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SDValue ShiftCst = DAG.getConstant(BitsDiff, dl, ShiftAmountTy);
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