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Chen Zheng
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[PowerPC] handle toc-data in load selection of fast-isel
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3 files changed

+12
-13
lines changed

3 files changed

+12
-13
lines changed

llvm/lib/Target/PowerPC/PPCFastISel.cpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2074,16 +2074,15 @@ unsigned PPCFastISel::PPCMaterializeGV(const GlobalValue *GV, MVT VT) {
20742074
if (GV->isThreadLocal())
20752075
return 0;
20762076

2077-
// If the global has the toc-data attribute then fallback to DAG-ISEL.
2078-
if (TM.getTargetTriple().isOSAIX())
2079-
if (const GlobalVariable *Var = dyn_cast_or_null<GlobalVariable>(GV))
2080-
if (Var->hasAttribute("toc-data"))
2081-
return false;
2082-
20832077
PPCFuncInfo->setUsesTOCBasePtr();
2078+
bool IsAIXTocData = TM.getTargetTriple().isOSAIX() &&
2079+
isa<GlobalVariable>(GV) &&
2080+
cast<GlobalVariable>(GV)->hasAttribute("toc-data");
2081+
20842082
// For small code model, generate a simple TOC load.
20852083
if (CModel == CodeModel::Small)
2086-
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::LDtoc),
2084+
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD,
2085+
IsAIXTocData ? TII.get(PPC::ADDItoc8) : TII.get(PPC::LDtoc),
20872086
DestReg)
20882087
.addGlobalAddress(GV)
20892088
.addReg(PPC::X2);
@@ -2101,6 +2100,7 @@ unsigned PPCFastISel::PPCMaterializeGV(const GlobalValue *GV, MVT VT) {
21012100
HighPartReg).addReg(PPC::X2).addGlobalAddress(GV);
21022101

21032102
if (Subtarget->isGVIndirectSymbol(GV)) {
2103+
assert(!IsAIXTocData && "TOC data should always be direct.");
21042104
BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, TII.get(PPC::LDtocL),
21052105
DestReg).addGlobalAddress(GV).addReg(HighPartReg);
21062106
} else {

llvm/test/CodeGen/PowerPC/aix-tocdata-fastisel.ll

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,7 @@ define signext i32 @foo() #1 {
1111
; SMALL-LABEL: foo:
1212
; SMALL: # %bb.0: # %entry
1313
; SMALL-NEXT: la 3, a[TD](2)
14-
; SMALL-NEXT: lwz 3, 0(3)
15-
; SMALL-NEXT: extsw 3, 3
14+
; SMALL-NEXT: lwa 3, 0(3)
1615
; SMALL-NEXT: blr
1716
entry:
1817
%0 = load i32, ptr @a, align 4

llvm/test/CodeGen/PowerPC/toc-data.ll

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -49,8 +49,8 @@ define dso_local void @write_int(i32 signext %in) {
4949

5050
; CHECK64-NOOPT: name: write_int
5151
; CHECK64-NOOPT: %[[SUBREG:[0-9]+]]:gprc = COPY %{{[0-9]}}.sub_32
52-
; CHECK64-NOOPT: %[[ADDR:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @i, $x2 :: (load (s64) from got)
53-
; CHECK64-NOOPT: STW %[[SUBREG]], 0, killed %[[ADDR]] :: (store (s32) into @i)
52+
; CHECK64-NOOPT: %[[ADDR:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @i, $x2
53+
; CHECK64-NOOPT: STW %[[SUBREG]], 0, %[[ADDR]]
5454

5555
; TEST64: .write_int:
5656
; TEST64: la 4, i[TD](2)
@@ -141,7 +141,7 @@ define dso_local float @read_float() {
141141

142142
; CHECK64-NOOPT: name: read_float
143143
; CHECK64-NOOPT: %[[SCRATCH:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @f, $x2
144-
; CHECK64-NOOPT: %{{[0-9]+}}:f4rc = LFS 0, killed %[[SCRATCH]]
144+
; CHECK64-NOOPT: %{{[0-9]+}}:f4rc = LFS 0, %[[SCRATCH]]
145145

146146
; TEST64: .read_float:
147147
; TEST64: la 3, f[TD](2)
@@ -228,7 +228,7 @@ define dso_local nonnull ptr @addr() {
228228
; CHECK64-NEXT: $x3 = COPY %[[SCRATCH]]
229229

230230
; CHECK64-NOOPT: name: addr
231-
; CHECK64-NOOPT: %[[SCRATCH:[0-9]+]]:g8rc = ADDItoc8 @i, $x2
231+
; CHECK64-NOOPT: %[[SCRATCH:[0-9]+]]:g8rc_and_g8rc_nox0 = ADDItoc8 @i, $x2
232232
; CHECK64-NOOPT: $x3 = COPY %[[SCRATCH]]
233233

234234
; TEST64: .addr

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