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AMDGPU: Check for implicit defs before constant folding instruction
Can't delete the constant folded instruction if scc is used. Fixes #63986 https://reviews.llvm.org/D157504
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‎llvm/include/llvm/CodeGen/MachineInstr.h

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@@ -1745,6 +1745,9 @@ class MachineInstr
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/// Return true if all the defs of this instruction are dead.
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bool allDefsAreDead() const;
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/// Return true if all the implicit defs of this instruction are dead.
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bool allImplicitDefsAreDead() const;
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/// Return a valid size if the instruction is a spill instruction.
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std::optional<unsigned> getSpillSize(const TargetInstrInfo *TII) const;
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‎llvm/lib/CodeGen/MachineInstr.cpp

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@@ -1497,6 +1497,16 @@ bool MachineInstr::allDefsAreDead() const {
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return true;
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}
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bool MachineInstr::allImplicitDefsAreDead() const {
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for (const MachineOperand &MO : implicit_operands()) {
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if (!MO.isReg() || MO.isUse())
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continue;
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if (!MO.isDead())
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return false;
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}
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return true;
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}
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/// copyImplicitOps - Copy implicit register operands from specified
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/// instruction to this instruction.
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void MachineInstr::copyImplicitOps(MachineFunction &MF,

‎llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

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@@ -1035,6 +1035,9 @@ SIFoldOperands::getImmOrMaterializedImm(MachineOperand &Op) const {
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// selection.
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// TODO: See if a frame index with a fixed offset can fold.
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bool SIFoldOperands::tryConstantFoldOp(MachineInstr *MI) const {
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if (!MI->allImplicitDefsAreDead())
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return false;
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unsigned Opc = MI->getOpcode();
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int Src0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src0);

‎llvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir

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Original file line numberDiff line numberDiff line change
@@ -790,3 +790,139 @@ body: |
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S_ENDPGM 0, implicit %4
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...
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---
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name: constant_s_and_b32_only_implicit_def_scc_is_used
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: constant_s_and_b32_only_implicit_def_scc_is_used
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; GCN: [[S_AND_B32_:%[0-9]+]]:sgpr_32 = S_AND_B32 32, 15, implicit-def $scc
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; GCN-NEXT: S_ENDPGM 0, implicit $scc
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%0:sgpr_32 = S_MOV_B32 32
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%1:sgpr_32 = S_MOV_B32 15
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%2:sgpr_32 = S_AND_B32 %0, %1, implicit-def $scc
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S_ENDPGM 0, implicit $scc
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...
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---
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name: constant_s_and_b32_implicit_def_scc_is_used
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: constant_s_and_b32_implicit_def_scc_is_used
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; GCN: [[S_AND_B32_:%[0-9]+]]:sgpr_32 = S_AND_B32 32, 15, implicit-def $scc
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; GCN-NEXT: S_ENDPGM 0, implicit [[S_AND_B32_]], implicit $scc
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%0:sgpr_32 = S_MOV_B32 32
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%1:sgpr_32 = S_MOV_B32 15
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%2:sgpr_32 = S_AND_B32 %0, %1, implicit-def $scc
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S_ENDPGM 0, implicit %2, implicit $scc
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...
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---
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name: constant_s_and_b32_only_implicit_def_scc_is_dead
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: constant_s_and_b32_only_implicit_def_scc_is_dead
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; GCN: S_ENDPGM 0, implicit undef $scc
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%0:sgpr_32 = S_MOV_B32 32
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%1:sgpr_32 = S_MOV_B32 15
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%2:sgpr_32 = S_AND_B32 %0, %1, implicit-def dead $scc
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S_ENDPGM 0, implicit undef $scc
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...
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---
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name: constant_s_or_b32_only_implicit_def_scc_is_used
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: constant_s_or_b32_only_implicit_def_scc_is_used
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; GCN: [[S_OR_B32_:%[0-9]+]]:sgpr_32 = S_OR_B32 32, 15, implicit-def $scc
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; GCN-NEXT: S_ENDPGM 0, implicit $scc
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%0:sgpr_32 = S_MOV_B32 32
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%1:sgpr_32 = S_MOV_B32 15
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%2:sgpr_32 = S_OR_B32 %0, %1, implicit-def $scc
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S_ENDPGM 0, implicit $scc
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...
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---
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name: constant_s_xor_b32_only_implicit_def_scc_is_used
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: constant_s_xor_b32_only_implicit_def_scc_is_used
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; GCN: [[S_XOR_B32_:%[0-9]+]]:sgpr_32 = S_XOR_B32 32, 15, implicit-def $scc
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; GCN-NEXT: S_ENDPGM 0, implicit $scc
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%0:sgpr_32 = S_MOV_B32 32
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%1:sgpr_32 = S_MOV_B32 15
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%2:sgpr_32 = S_XOR_B32 %0, %1, implicit-def $scc
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S_ENDPGM 0, implicit $scc
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...
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---
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name: constant_s_not_b32_only_implicit_def_scc_is_used
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: constant_s_not_b32_only_implicit_def_scc_is_used
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; GCN: [[S_NOT_B32_:%[0-9]+]]:sgpr_32 = S_NOT_B32 32, implicit-def $scc
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; GCN-NEXT: S_ENDPGM 0, implicit $scc
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%0:sgpr_32 = S_MOV_B32 32
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%1:sgpr_32 = S_NOT_B32 %0, implicit-def $scc
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S_ENDPGM 0, implicit $scc
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...
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# Really really implicit operand
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---
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name: constant_v_and_b32_implicit_def_scc_is_used
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: constant_v_and_b32_implicit_def_scc_is_used
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
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; GCN-NEXT: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 32, [[V_MOV_B32_e32_]], implicit $exec, implicit-def $scc
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; GCN-NEXT: S_ENDPGM 0, implicit $scc
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%0:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
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%1:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
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%2:vgpr_32 = V_AND_B32_e32 %0, %1, implicit $exec, implicit-def $scc
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S_ENDPGM 0, implicit $scc
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897+
...
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---
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name: constant_v_and_b32_implicit_def_vreg_is_used
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: constant_v_and_b32_implicit_def_vreg_is_used
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
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; GCN-NEXT: [[V_AND_B32_e32_:%[0-9]+]]:vgpr_32 = V_AND_B32_e32 32, [[V_MOV_B32_e32_]], implicit $exec, implicit-def %3
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; GCN-NEXT: S_ENDPGM 0, implicit %3
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%0:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
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%1:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
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%2:vgpr_32 = V_AND_B32_e32 %0, %1, implicit $exec, implicit-def %3:vgpr_32
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S_ENDPGM 0, implicit %3
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913+
...
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---
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name: constant_v_and_b32_implicit_use
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: constant_v_and_b32_implicit_use
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
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; GCN-NEXT: S_ENDPGM 0, implicit [[V_MOV_B32_e32_]]
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%0:vgpr_32 = V_MOV_B32_e32 32, implicit $exec
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%1:vgpr_32 = V_MOV_B32_e32 15, implicit $exec
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%2:vgpr_32 = V_MOV_B32_e32 24, implicit $exec
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%3:vgpr_32 = V_AND_B32_e32 %0, %1, implicit $exec, implicit %2:vgpr_32
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S_ENDPGM 0, implicit %3
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...

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