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[AArch64] Add some additional add mul imm tests with multiple uses. NFC
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-20
lines changed

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+279
-20
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llvm/test/CodeGen/AArch64/addimm-mulimm.ll

Lines changed: 279 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -4,8 +4,8 @@
44
define i64 @addimm_mulimm_accept_00(i64 %a) {
55
; CHECK-LABEL: addimm_mulimm_accept_00:
66
; CHECK: // %bb.0:
7-
; CHECK-NEXT: mov w8, #37
8-
; CHECK-NEXT: mov x9, #1147
7+
; CHECK-NEXT: mov w8, #37 // =0x25
8+
; CHECK-NEXT: mov x9, #1147 // =0x47b
99
; CHECK-NEXT: madd x0, x0, x8, x9
1010
; CHECK-NEXT: ret
1111
%tmp0 = add i64 %a, 31
@@ -16,8 +16,8 @@ define i64 @addimm_mulimm_accept_00(i64 %a) {
1616
define i64 @addimm_mulimm_accept_01(i64 %a) {
1717
; CHECK-LABEL: addimm_mulimm_accept_01:
1818
; CHECK: // %bb.0:
19-
; CHECK-NEXT: mov w8, #37
20-
; CHECK-NEXT: mov x9, #-1147
19+
; CHECK-NEXT: mov w8, #37 // =0x25
20+
; CHECK-NEXT: mov x9, #-1147 // =0xfffffffffffffb85
2121
; CHECK-NEXT: madd x0, x0, x8, x9
2222
; CHECK-NEXT: ret
2323
%tmp0 = add i64 %a, -31
@@ -28,8 +28,8 @@ define i64 @addimm_mulimm_accept_01(i64 %a) {
2828
define signext i32 @addimm_mulimm_accept_02(i32 signext %a) {
2929
; CHECK-LABEL: addimm_mulimm_accept_02:
3030
; CHECK: // %bb.0:
31-
; CHECK-NEXT: mov w8, #37
32-
; CHECK-NEXT: mov w9, #1147
31+
; CHECK-NEXT: mov w8, #37 // =0x25
32+
; CHECK-NEXT: mov w9, #1147 // =0x47b
3333
; CHECK-NEXT: madd w0, w0, w8, w9
3434
; CHECK-NEXT: ret
3535
%tmp0 = add i32 %a, 31
@@ -40,8 +40,8 @@ define signext i32 @addimm_mulimm_accept_02(i32 signext %a) {
4040
define signext i32 @addimm_mulimm_accept_03(i32 signext %a) {
4141
; CHECK-LABEL: addimm_mulimm_accept_03:
4242
; CHECK: // %bb.0:
43-
; CHECK-NEXT: mov w8, #37
44-
; CHECK-NEXT: mov w9, #-1147
43+
; CHECK-NEXT: mov w8, #37 // =0x25
44+
; CHECK-NEXT: mov w9, #-1147 // =0xfffffb85
4545
; CHECK-NEXT: madd w0, w0, w8, w9
4646
; CHECK-NEXT: ret
4747
%tmp0 = add i32 %a, -31
@@ -52,8 +52,8 @@ define signext i32 @addimm_mulimm_accept_03(i32 signext %a) {
5252
define i64 @addimm_mulimm_accept_10(i64 %a) {
5353
; CHECK-LABEL: addimm_mulimm_accept_10:
5454
; CHECK: // %bb.0:
55-
; CHECK-NEXT: mov w8, #37
56-
; CHECK-NEXT: mov w9, #32888
55+
; CHECK-NEXT: mov w8, #37 // =0x25
56+
; CHECK-NEXT: mov w9, #32888 // =0x8078
5757
; CHECK-NEXT: movk w9, #17, lsl #16
5858
; CHECK-NEXT: madd x0, x0, x8, x9
5959
; CHECK-NEXT: ret
@@ -65,8 +65,8 @@ define i64 @addimm_mulimm_accept_10(i64 %a) {
6565
define i64 @addimm_mulimm_accept_11(i64 %a) {
6666
; CHECK-LABEL: addimm_mulimm_accept_11:
6767
; CHECK: // %bb.0:
68-
; CHECK-NEXT: mov w8, #37
69-
; CHECK-NEXT: mov x9, #-32888
68+
; CHECK-NEXT: mov w8, #37 // =0x25
69+
; CHECK-NEXT: mov x9, #-32888 // =0xffffffffffff7f88
7070
; CHECK-NEXT: movk x9, #65518, lsl #16
7171
; CHECK-NEXT: madd x0, x0, x8, x9
7272
; CHECK-NEXT: ret
@@ -78,8 +78,8 @@ define i64 @addimm_mulimm_accept_11(i64 %a) {
7878
define signext i32 @addimm_mulimm_accept_12(i32 signext %a) {
7979
; CHECK-LABEL: addimm_mulimm_accept_12:
8080
; CHECK: // %bb.0:
81-
; CHECK-NEXT: mov w8, #37
82-
; CHECK-NEXT: mov w9, #32888
81+
; CHECK-NEXT: mov w8, #37 // =0x25
82+
; CHECK-NEXT: mov w9, #32888 // =0x8078
8383
; CHECK-NEXT: movk w9, #17, lsl #16
8484
; CHECK-NEXT: madd w0, w0, w8, w9
8585
; CHECK-NEXT: ret
@@ -91,8 +91,8 @@ define signext i32 @addimm_mulimm_accept_12(i32 signext %a) {
9191
define signext i32 @addimm_mulimm_accept_13(i32 signext %a) {
9292
; CHECK-LABEL: addimm_mulimm_accept_13:
9393
; CHECK: // %bb.0:
94-
; CHECK-NEXT: mov w8, #37
95-
; CHECK-NEXT: mov w9, #32648
94+
; CHECK-NEXT: mov w8, #37 // =0x25
95+
; CHECK-NEXT: mov w9, #32648 // =0x7f88
9696
; CHECK-NEXT: movk w9, #65518, lsl #16
9797
; CHECK-NEXT: madd w0, w0, w8, w9
9898
; CHECK-NEXT: ret
@@ -104,7 +104,7 @@ define signext i32 @addimm_mulimm_accept_13(i32 signext %a) {
104104
define i64 @addimm_mulimm_reject_00(i64 %a) {
105105
; CHECK-LABEL: addimm_mulimm_reject_00:
106106
; CHECK: // %bb.0:
107-
; CHECK-NEXT: mov w8, #3700
107+
; CHECK-NEXT: mov w8, #3700 // =0xe74
108108
; CHECK-NEXT: add x9, x0, #3100
109109
; CHECK-NEXT: mul x0, x9, x8
110110
; CHECK-NEXT: ret
@@ -116,7 +116,7 @@ define i64 @addimm_mulimm_reject_00(i64 %a) {
116116
define i64 @addimm_mulimm_reject_01(i64 %a) {
117117
; CHECK-LABEL: addimm_mulimm_reject_01:
118118
; CHECK: // %bb.0:
119-
; CHECK-NEXT: mov w8, #3700
119+
; CHECK-NEXT: mov w8, #3700 // =0xe74
120120
; CHECK-NEXT: sub x9, x0, #3100
121121
; CHECK-NEXT: mul x0, x9, x8
122122
; CHECK-NEXT: ret
@@ -128,7 +128,7 @@ define i64 @addimm_mulimm_reject_01(i64 %a) {
128128
define signext i32 @addimm_mulimm_reject_02(i32 signext %a) {
129129
; CHECK-LABEL: addimm_mulimm_reject_02:
130130
; CHECK: // %bb.0:
131-
; CHECK-NEXT: mov w8, #3700
131+
; CHECK-NEXT: mov w8, #3700 // =0xe74
132132
; CHECK-NEXT: add w9, w0, #3100
133133
; CHECK-NEXT: mul w0, w9, w8
134134
; CHECK-NEXT: ret
@@ -140,11 +140,270 @@ define signext i32 @addimm_mulimm_reject_02(i32 signext %a) {
140140
define signext i32 @addimm_mulimm_reject_03(i32 signext %a) {
141141
; CHECK-LABEL: addimm_mulimm_reject_03:
142142
; CHECK: // %bb.0:
143-
; CHECK-NEXT: mov w8, #3700
143+
; CHECK-NEXT: mov w8, #3700 // =0xe74
144144
; CHECK-NEXT: sub w9, w0, #3100
145145
; CHECK-NEXT: mul w0, w9, w8
146146
; CHECK-NEXT: ret
147147
%tmp0 = add i32 %a, -3100
148148
%tmp1 = mul i32 %tmp0, 3700
149149
ret i32 %tmp1
150150
}
151+
152+
define signext i32 @addmuladd(i32 signext %a) {
153+
; CHECK-LABEL: addmuladd:
154+
; CHECK: // %bb.0:
155+
; CHECK-NEXT: mov w8, #324 // =0x144
156+
; CHECK-NEXT: mov w9, #1300 // =0x514
157+
; CHECK-NEXT: madd w0, w0, w8, w9
158+
; CHECK-NEXT: ret
159+
%tmp0 = add i32 %a, 4
160+
%tmp1 = mul i32 %tmp0, 324
161+
%tmp2 = add i32 %tmp1, 4
162+
ret i32 %tmp2
163+
}
164+
165+
define signext i32 @addmuladd_multiuse(i32 signext %a) {
166+
; CHECK-LABEL: addmuladd_multiuse:
167+
; CHECK: // %bb.0:
168+
; CHECK-NEXT: mov w8, #324 // =0x144
169+
; CHECK-NEXT: add w9, w0, #4
170+
; CHECK-NEXT: mov w10, #4 // =0x4
171+
; CHECK-NEXT: madd w8, w9, w8, w10
172+
; CHECK-NEXT: eor w0, w9, w8
173+
; CHECK-NEXT: ret
174+
%tmp0 = add i32 %a, 4
175+
%tmp1 = mul i32 %tmp0, 324
176+
%tmp2 = add i32 %tmp1, 4
177+
%tmp3 = xor i32 %tmp0, %tmp2
178+
ret i32 %tmp3
179+
}
180+
181+
define signext i32 @addmuladd_multiusemul(i32 signext %a) {
182+
; CHECK-LABEL: addmuladd_multiusemul:
183+
; CHECK: // %bb.0:
184+
; CHECK-NEXT: mov w8, #324 // =0x144
185+
; CHECK-NEXT: mul w8, w0, w8
186+
; CHECK-NEXT: add w9, w8, #1296
187+
; CHECK-NEXT: add w8, w8, #1300
188+
; CHECK-NEXT: eor w0, w9, w8
189+
; CHECK-NEXT: ret
190+
%tmp0 = add i32 %a, 4
191+
%tmp1 = mul i32 %tmp0, 324
192+
%tmp2 = add i32 %tmp1, 4
193+
%tmp3 = xor i32 %tmp1, %tmp2
194+
ret i32 %tmp3
195+
}
196+
197+
define signext i32 @addmuladd_multiuse2(i32 signext %a) {
198+
; CHECK-LABEL: addmuladd_multiuse2:
199+
; CHECK: // %bb.0:
200+
; CHECK-NEXT: mov w8, #324 // =0x144
201+
; CHECK-NEXT: add w9, w0, #4
202+
; CHECK-NEXT: mov w11, #4 // =0x4
203+
; CHECK-NEXT: lsl w10, w9, #2
204+
; CHECK-NEXT: madd w8, w9, w8, w11
205+
; CHECK-NEXT: add w9, w10, #4
206+
; CHECK-NEXT: eor w0, w8, w9
207+
; CHECK-NEXT: ret
208+
%tmp0 = add i32 %a, 4
209+
%tmp1 = mul i32 %tmp0, 4
210+
%tmp2 = add i32 %tmp1, 4
211+
%tmp3 = mul i32 %tmp0, 324
212+
%tmp4 = add i32 %tmp3, 4
213+
%tmp5 = xor i32 %tmp4, %tmp2
214+
ret i32 %tmp5
215+
}
216+
217+
define signext i32 @addaddmuladd(i32 signext %a, i32 %b) {
218+
; CHECK-LABEL: addaddmuladd:
219+
; CHECK: // %bb.0:
220+
; CHECK-NEXT: mov w8, #324 // =0x144
221+
; CHECK-NEXT: madd w8, w0, w8, w1
222+
; CHECK-NEXT: add w0, w8, #1300
223+
; CHECK-NEXT: ret
224+
%tmp0 = add i32 %a, 4
225+
%tmp1 = mul i32 %tmp0, 324
226+
%tmp2 = add i32 %tmp1, %b
227+
%tmp3 = add i32 %tmp2, 4
228+
ret i32 %tmp3
229+
}
230+
231+
define signext i32 @addaddmuladd_multiuse(i32 signext %a, i32 %b) {
232+
; CHECK-LABEL: addaddmuladd_multiuse:
233+
; CHECK: // %bb.0:
234+
; CHECK-NEXT: mov w8, #324 // =0x144
235+
; CHECK-NEXT: add w9, w0, #4
236+
; CHECK-NEXT: madd w8, w9, w8, w1
237+
; CHECK-NEXT: add w8, w8, #4
238+
; CHECK-NEXT: eor w0, w9, w8
239+
; CHECK-NEXT: ret
240+
%tmp0 = add i32 %a, 4
241+
%tmp1 = mul i32 %tmp0, 324
242+
%tmp2 = add i32 %tmp1, %b
243+
%tmp3 = add i32 %tmp2, 4
244+
%tmp4 = xor i32 %tmp0, %tmp3
245+
ret i32 %tmp4
246+
}
247+
248+
define signext i32 @addaddmuladd_multiuse2(i32 signext %a, i32 %b) {
249+
; CHECK-LABEL: addaddmuladd_multiuse2:
250+
; CHECK: // %bb.0:
251+
; CHECK-NEXT: mov w8, #324 // =0x144
252+
; CHECK-NEXT: add w9, w0, #4
253+
; CHECK-NEXT: mov w10, #162 // =0xa2
254+
; CHECK-NEXT: madd w8, w9, w8, w1
255+
; CHECK-NEXT: madd w9, w9, w10, w1
256+
; CHECK-NEXT: add w8, w8, #4
257+
; CHECK-NEXT: add w9, w9, #4
258+
; CHECK-NEXT: eor w0, w9, w8
259+
; CHECK-NEXT: ret
260+
%tmp0 = add i32 %a, 4
261+
%tmp1 = mul i32 %tmp0, 324
262+
%tmp2 = add i32 %tmp1, %b
263+
%tmp3 = add i32 %tmp2, 4
264+
%tmp1b = mul i32 %tmp0, 162
265+
%tmp2b = add i32 %tmp1b, %b
266+
%tmp3b = add i32 %tmp2b, 4
267+
%tmp4 = xor i32 %tmp3b, %tmp3
268+
ret i32 %tmp4
269+
}
270+
271+
define <4 x i32> @addmuladd_vec(<4 x i32> %a) {
272+
; CHECK-LABEL: addmuladd_vec:
273+
; CHECK: // %bb.0:
274+
; CHECK-NEXT: mov w8, #324 // =0x144
275+
; CHECK-NEXT: mov w9, #1300 // =0x514
276+
; CHECK-NEXT: dup v2.4s, w8
277+
; CHECK-NEXT: dup v1.4s, w9
278+
; CHECK-NEXT: mla v1.4s, v0.4s, v2.4s
279+
; CHECK-NEXT: mov v0.16b, v1.16b
280+
; CHECK-NEXT: ret
281+
%tmp0 = add <4 x i32> %a, <i32 4, i32 4, i32 4, i32 4>
282+
%tmp1 = mul <4 x i32> %tmp0, <i32 324, i32 324, i32 324, i32 324>
283+
%tmp2 = add <4 x i32> %tmp1, <i32 4, i32 4, i32 4, i32 4>
284+
ret <4 x i32> %tmp2
285+
}
286+
287+
define <4 x i32> @addmuladd_vec_multiuse(<4 x i32> %a) {
288+
; CHECK-LABEL: addmuladd_vec_multiuse:
289+
; CHECK: // %bb.0:
290+
; CHECK-NEXT: movi v1.4s, #4
291+
; CHECK-NEXT: mov w8, #324 // =0x144
292+
; CHECK-NEXT: dup v2.4s, w8
293+
; CHECK-NEXT: add v0.4s, v0.4s, v1.4s
294+
; CHECK-NEXT: mla v1.4s, v0.4s, v2.4s
295+
; CHECK-NEXT: eor v0.16b, v0.16b, v1.16b
296+
; CHECK-NEXT: ret
297+
%tmp0 = add <4 x i32> %a, <i32 4, i32 4, i32 4, i32 4>
298+
%tmp1 = mul <4 x i32> %tmp0, <i32 324, i32 324, i32 324, i32 324>
299+
%tmp2 = add <4 x i32> %tmp1, <i32 4, i32 4, i32 4, i32 4>
300+
%tmp3 = xor <4 x i32> %tmp0, %tmp2
301+
ret <4 x i32> %tmp3
302+
}
303+
304+
define void @addmuladd_gep(ptr %p, i64 %a) {
305+
; CHECK-LABEL: addmuladd_gep:
306+
; CHECK: // %bb.0:
307+
; CHECK-NEXT: mov w8, #40 // =0x28
308+
; CHECK-NEXT: str wzr, [x0, #10]!
309+
; CHECK-NEXT: madd x8, x1, x8, x0
310+
; CHECK-NEXT: str wzr, [x8, #20]
311+
; CHECK-NEXT: ret
312+
%q = getelementptr i8, ptr %p, i64 10
313+
%r = getelementptr [10 x [10 x i32]], ptr %q, i64 0, i64 %a, i64 5
314+
store i32 0, ptr %q
315+
store i32 0, ptr %r
316+
ret void
317+
}
318+
319+
define i32 @addmuladd_gep2(ptr %p, i32 %a) {
320+
; CHECK-LABEL: addmuladd_gep2:
321+
; CHECK: // %bb.0:
322+
; CHECK-NEXT: // kill: def $w1 killed $w1 def $x1
323+
; CHECK-NEXT: sxtw x8, w1
324+
; CHECK-NEXT: mov w9, #3240 // =0xca8
325+
; CHECK-NEXT: add x8, x8, #1
326+
; CHECK-NEXT: madd x9, x8, x9, x0
327+
; CHECK-NEXT: ldr w9, [x9, #20]
328+
; CHECK-NEXT: tbnz w9, #31, .LBB22_2
329+
; CHECK-NEXT: // %bb.1:
330+
; CHECK-NEXT: mov w0, wzr
331+
; CHECK-NEXT: ret
332+
; CHECK-NEXT: .LBB22_2: // %then
333+
; CHECK-NEXT: str x8, [x0]
334+
; CHECK-NEXT: mov w0, #1 // =0x1
335+
; CHECK-NEXT: ret
336+
%b = sext i32 %a to i64
337+
%c = add nsw i64 %b, 1
338+
%d = mul nsw i64 %c, 81
339+
%g = getelementptr [10 x [10 x i32]], ptr %p, i64 0, i64 %d, i64 5
340+
%l = load i32, ptr %g, align 4
341+
%cc = icmp slt i32 %l, 0
342+
br i1 %cc, label %then, label %else
343+
then:
344+
store i64 %c, ptr %p
345+
ret i32 1
346+
else:
347+
ret i32 0
348+
}
349+
350+
define signext i32 @addmuladd_multiuse2_nsw(i32 signext %a) {
351+
; CHECK-LABEL: addmuladd_multiuse2_nsw:
352+
; CHECK: // %bb.0:
353+
; CHECK-NEXT: mov w8, #324 // =0x144
354+
; CHECK-NEXT: add w9, w0, #4
355+
; CHECK-NEXT: mov w11, #4 // =0x4
356+
; CHECK-NEXT: lsl w10, w9, #2
357+
; CHECK-NEXT: madd w8, w9, w8, w11
358+
; CHECK-NEXT: add w9, w10, #4
359+
; CHECK-NEXT: eor w0, w8, w9
360+
; CHECK-NEXT: ret
361+
%tmp0 = add nsw i32 %a, 4
362+
%tmp1 = mul nsw i32 %tmp0, 4
363+
%tmp2 = add nsw i32 %tmp1, 4
364+
%tmp3 = mul nsw i32 %tmp0, 324
365+
%tmp4 = add nsw i32 %tmp3, 4
366+
%tmp5 = xor i32 %tmp4, %tmp2
367+
ret i32 %tmp5
368+
}
369+
370+
define signext i32 @addmuladd_multiuse2_nuw(i32 signext %a) {
371+
; CHECK-LABEL: addmuladd_multiuse2_nuw:
372+
; CHECK: // %bb.0:
373+
; CHECK-NEXT: mov w8, #324 // =0x144
374+
; CHECK-NEXT: add w9, w0, #4
375+
; CHECK-NEXT: mov w11, #4 // =0x4
376+
; CHECK-NEXT: lsl w10, w9, #2
377+
; CHECK-NEXT: madd w8, w9, w8, w11
378+
; CHECK-NEXT: add w9, w10, #4
379+
; CHECK-NEXT: eor w0, w8, w9
380+
; CHECK-NEXT: ret
381+
%tmp0 = add nuw i32 %a, 4
382+
%tmp1 = mul nuw i32 %tmp0, 4
383+
%tmp2 = add nuw i32 %tmp1, 4
384+
%tmp3 = mul nuw i32 %tmp0, 324
385+
%tmp4 = add nuw i32 %tmp3, 4
386+
%tmp5 = xor i32 %tmp4, %tmp2
387+
ret i32 %tmp5
388+
}
389+
390+
define signext i32 @addmuladd_multiuse2_nswnuw(i32 signext %a) {
391+
; CHECK-LABEL: addmuladd_multiuse2_nswnuw:
392+
; CHECK: // %bb.0:
393+
; CHECK-NEXT: mov w8, #324 // =0x144
394+
; CHECK-NEXT: add w9, w0, #4
395+
; CHECK-NEXT: mov w11, #4 // =0x4
396+
; CHECK-NEXT: lsl w10, w9, #2
397+
; CHECK-NEXT: madd w8, w9, w8, w11
398+
; CHECK-NEXT: add w9, w10, #4
399+
; CHECK-NEXT: eor w0, w8, w9
400+
; CHECK-NEXT: ret
401+
%tmp0 = add nsw nuw i32 %a, 4
402+
%tmp1 = mul nsw nuw i32 %tmp0, 4
403+
%tmp2 = add nsw nuw i32 %tmp1, 4
404+
%tmp3 = mul nsw nuw i32 %tmp0, 324
405+
%tmp4 = add nsw nuw i32 %tmp3, 4
406+
%tmp5 = xor i32 %tmp4, %tmp2
407+
ret i32 %tmp5
408+
}
409+

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