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[MLIR][OpenMP][OMPIRBuilder] Add lowering support for omp.target_triples
This patch modifies MLIR to LLVM IR lowering of the OpenMP dialect to take into consideration the contents of the `omp.target_triples` module attribute while generating code for `omp.target` operations. It adds the `OpenMPIRBuilderConfig::TargetTriples` field and initializes it using the `amendOperation` flow of the `OpenMPToLLVMIRTranslation` pass. Some changes are introduced into the `OpenMPIRBuilder` to allow passing the information about whether a target region is intended to be offloaded from outside. The result of this change is that offloading calls are only generated when the `--offload-arch` or `-fopenmp-targets` options are given to the compiler. Otherwise, only the host fallback code is generated. This fixes linker errors currently triggered by `flang-new` if a source file containing a `target` construct is compiled without any of the aforementioned options. Several unit tests impacted by these changes, which are intended to check host code generated for `omp.target` operations, are updated to contain the new attribute. Without it, no calls to `__tgt_target_kernel` and associated control flow operations are generated. Fixes #100209.
1 parent f16bc33 commit 9094873

14 files changed

+130
-33
lines changed

‎flang/test/Integration/OpenMP/map-types-and-sizes.f90

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@
66
! added to this directory and sub-directories.
77
!===----------------------------------------------------------------------===!
88

9-
!RUN: %flang_fc1 -emit-llvm -fopenmp -flang-deprecated-no-hlfir %s -o - | FileCheck %s
9+
!RUN: %flang_fc1 -emit-llvm -fopenmp -fopenmp-targets=amdgcn-amd-amdhsa -flang-deprecated-no-hlfir %s -o - | FileCheck %s
1010

1111
!===============================================================================
1212
! Check MapTypes for target implicit captures

‎llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -115,6 +115,10 @@ class OpenMPIRBuilderConfig {
115115
// Grid Value for the GPU target
116116
std::optional<omp::GV> GridValue;
117117

118+
/// When compilation is being done for the OpenMP host (i.e. `IsTargetDevice =
119+
/// false`), this contains the list of offloading triples associated, if any.
120+
SmallVector<Triple> TargetTriples;
121+
118122
OpenMPIRBuilderConfig();
119123
OpenMPIRBuilderConfig(bool IsTargetDevice, bool IsGPU,
120124
bool OpenMPOffloadMandatory,
@@ -2815,6 +2819,7 @@ class OpenMPIRBuilder {
28152819
/// Generator for '#omp target'
28162820
///
28172821
/// \param Loc where the target data construct was encountered.
2822+
/// \param IsOffloadEntry whether it is an offload entry.
28182823
/// \param CodeGenIP The insertion point where the call to the outlined
28192824
/// function should be emitted.
28202825
/// \param EntryInfo The entry information about the function.
@@ -2828,6 +2833,7 @@ class OpenMPIRBuilder {
28282833
/// \param Dependencies A vector of DependData objects that carry
28292834
// dependency information as passed in the depend clause
28302835
InsertPointTy createTarget(const LocationDescription &Loc,
2836+
bool IsOffloadEntry,
28312837
OpenMPIRBuilder::InsertPointTy AllocaIP,
28322838
OpenMPIRBuilder::InsertPointTy CodeGenIP,
28332839
TargetRegionEntryInfo &EntryInfo, int32_t NumTeams,

‎llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp

Lines changed: 25 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -6769,7 +6769,7 @@ static Function *emitTargetTaskProxyFunction(OpenMPIRBuilder &OMPBuilder,
67696769
return ProxyFn;
67706770
}
67716771
static void emitTargetOutlinedFunction(
6772-
OpenMPIRBuilder &OMPBuilder, IRBuilderBase &Builder,
6772+
OpenMPIRBuilder &OMPBuilder, IRBuilderBase &Builder, bool IsOffloadEntry,
67736773
TargetRegionEntryInfo &EntryInfo, Function *&OutlinedFn,
67746774
Constant *&OutlinedFnID, SmallVectorImpl<Value *> &Inputs,
67756775
OpenMPIRBuilder::TargetBodyGenCallbackTy &CBFunc,
@@ -6782,8 +6782,8 @@ static void emitTargetOutlinedFunction(
67826782
CBFunc, ArgAccessorFuncCB);
67836783
};
67846784

6785-
OMPBuilder.emitTargetRegionFunction(EntryInfo, GenerateOutlinedFunction, true,
6786-
OutlinedFn, OutlinedFnID);
6785+
OMPBuilder.emitTargetRegionFunction(EntryInfo, GenerateOutlinedFunction,
6786+
IsOffloadEntry, OutlinedFn, OutlinedFnID);
67876787
}
67886788
OpenMPIRBuilder::InsertPointTy OpenMPIRBuilder::emitTargetTask(
67896789
Function *OutlinedFn, Value *OutlinedFnID,
@@ -7053,13 +7053,30 @@ OpenMPIRBuilder::InsertPointTy OpenMPIRBuilder::emitTargetTask(
70537053
<< "\n");
70547054
return Builder.saveIP();
70557055
}
7056+
70567057
static void emitTargetCall(
70577058
OpenMPIRBuilder &OMPBuilder, IRBuilderBase &Builder,
70587059
OpenMPIRBuilder::InsertPointTy AllocaIP, Function *OutlinedFn,
70597060
Constant *OutlinedFnID, int32_t NumTeams, int32_t NumThreads,
70607061
SmallVectorImpl<Value *> &Args,
70617062
OpenMPIRBuilder::GenMapInfoCallbackTy GenMapInfoCB,
70627063
SmallVector<llvm::OpenMPIRBuilder::DependData> Dependencies = {}) {
7064+
// Generate a function call to the host fallback implementation of the target
7065+
// region. This is called by the host when no offload entry was generated for
7066+
// the target region and when the offloading call fails at runtime.
7067+
auto &&EmitTargetCallFallbackCB =
7068+
[&](OpenMPIRBuilder::InsertPointTy IP) -> OpenMPIRBuilder::InsertPointTy {
7069+
Builder.restoreIP(IP);
7070+
Builder.CreateCall(OutlinedFn, Args);
7071+
return Builder.saveIP();
7072+
};
7073+
7074+
// If we don't have an ID for the target region, it means an offload entry
7075+
// wasn't created. In this case we just run the host fallback directly.
7076+
if (!OutlinedFnID) {
7077+
Builder.restoreIP(EmitTargetCallFallbackCB(Builder.saveIP()));
7078+
return;
7079+
}
70637080

70647081
OpenMPIRBuilder::TargetDataInfo Info(
70657082
/*RequiresDevicePointerInfo=*/false,
@@ -7073,14 +7090,6 @@ static void emitTargetCall(
70737090
OMPBuilder.emitOffloadingArraysArgument(Builder, RTArgs, Info,
70747091
!MapInfo.Names.empty());
70757092

7076-
// emitKernelLaunch
7077-
auto &&EmitTargetCallFallbackCB =
7078-
[&](OpenMPIRBuilder::InsertPointTy IP) -> OpenMPIRBuilder::InsertPointTy {
7079-
Builder.restoreIP(IP);
7080-
Builder.CreateCall(OutlinedFn, Args);
7081-
return Builder.saveIP();
7082-
};
7083-
70847093
unsigned NumTargetItems = MapInfo.BasePointers.size();
70857094
// TODO: Use correct device ID
70867095
Value *DeviceID = Builder.getInt64(OMP_DEVICEID_UNDEF);
@@ -7116,7 +7125,7 @@ static void emitTargetCall(
71167125
}
71177126
}
71187127
OpenMPIRBuilder::InsertPointTy OpenMPIRBuilder::createTarget(
7119-
const LocationDescription &Loc, InsertPointTy AllocaIP,
7128+
const LocationDescription &Loc, bool IsOffloadEntry, InsertPointTy AllocaIP,
71207129
InsertPointTy CodeGenIP, TargetRegionEntryInfo &EntryInfo, int32_t NumTeams,
71217130
int32_t NumThreads, SmallVectorImpl<Value *> &Args,
71227131
GenMapInfoCallbackTy GenMapInfoCB,
@@ -7130,12 +7139,13 @@ OpenMPIRBuilder::InsertPointTy OpenMPIRBuilder::createTarget(
71307139
Builder.restoreIP(CodeGenIP);
71317140

71327141
Function *OutlinedFn;
7133-
Constant *OutlinedFnID;
7142+
Constant *OutlinedFnID = nullptr;
71347143
// The target region is outlined into its own function. The LLVM IR for
71357144
// the target region itself is generated using the callbacks CBFunc
71367145
// and ArgAccessorFuncCB
7137-
emitTargetOutlinedFunction(*this, Builder, EntryInfo, OutlinedFn,
7138-
OutlinedFnID, Args, CBFunc, ArgAccessorFuncCB);
7146+
emitTargetOutlinedFunction(*this, Builder, IsOffloadEntry, EntryInfo,
7147+
OutlinedFn, OutlinedFnID, Args, CBFunc,
7148+
ArgAccessorFuncCB);
71397149

71407150
// If we are not on the target device, then we need to generate code
71417151
// to make a remote call (offload) to the previously outlined function

‎llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp

Lines changed: 6 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -5983,8 +5983,8 @@ TEST_F(OpenMPIRBuilderTest, TargetRegion) {
59835983
TargetRegionEntryInfo EntryInfo("func", 42, 4711, 17);
59845984
OpenMPIRBuilder::LocationDescription OmpLoc({Builder.saveIP(), DL});
59855985
Builder.restoreIP(OMPBuilder.createTarget(
5986-
OmpLoc, Builder.saveIP(), Builder.saveIP(), EntryInfo, -1, 0, Inputs,
5987-
GenMapInfoCB, BodyGenCB, SimpleArgAccessorCB));
5986+
OmpLoc, /*IsOffloadEntry=*/true, Builder.saveIP(), Builder.saveIP(),
5987+
EntryInfo, -1, 0, Inputs, GenMapInfoCB, BodyGenCB, SimpleArgAccessorCB));
59885988
OMPBuilder.finalize();
59895989
Builder.CreateRetVoid();
59905990

@@ -6087,7 +6087,8 @@ TEST_F(OpenMPIRBuilderTest, TargetRegionDevice) {
60876087
/*Line=*/3, /*Count=*/0);
60886088

60896089
Builder.restoreIP(
6090-
OMPBuilder.createTarget(Loc, EntryIP, EntryIP, EntryInfo, /*NumTeams=*/-1,
6090+
OMPBuilder.createTarget(Loc, /*IsOffloadEntry=*/true, EntryIP, EntryIP,
6091+
EntryInfo, /*NumTeams=*/-1,
60916092
/*NumThreads=*/0, CapturedArgs, GenMapInfoCB,
60926093
BodyGenCB, SimpleArgAccessorCB));
60936094

@@ -6235,7 +6236,8 @@ TEST_F(OpenMPIRBuilderTest, ConstantAllocaRaise) {
62356236
/*Line=*/3, /*Count=*/0);
62366237

62376238
Builder.restoreIP(
6238-
OMPBuilder.createTarget(Loc, EntryIP, EntryIP, EntryInfo, /*NumTeams=*/-1,
6239+
OMPBuilder.createTarget(Loc, /*IsOffloadEntry=*/true, EntryIP, EntryIP,
6240+
EntryInfo, /*NumTeams=*/-1,
62396241
/*NumThreads=*/0, CapturedArgs, GenMapInfoCB,
62406242
BodyGenCB, SimpleArgAccessorCB));
62416243

‎mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp

Lines changed: 28 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -3196,13 +3196,20 @@ convertOmpTarget(Operation &opInst, llvm::IRBuilderBase &builder,
31963196
if (!targetOpSupported(opInst))
31973197
return failure();
31983198

3199+
llvm::OpenMPIRBuilder *ompBuilder = moduleTranslation.getOpenMPBuilder();
3200+
bool isTargetDevice = ompBuilder->Config.isTargetDevice();
31993201
auto parentFn = opInst.getParentOfType<LLVM::LLVMFuncOp>();
32003202
auto targetOp = cast<omp::TargetOp>(opInst);
32013203
auto &targetRegion = targetOp.getRegion();
32023204
DataLayout dl = DataLayout(opInst.getParentOfType<ModuleOp>());
32033205
SmallVector<Value> mapOperands = targetOp.getMapOperands();
32043206
llvm::Function *llvmOutlinedFn = nullptr;
32053207

3208+
// TODO: It can also be false if a compile-time constant `false` IF clause is
3209+
// specified.
3210+
bool isOffloadEntry =
3211+
isTargetDevice || !ompBuilder->Config.TargetTriples.empty();
3212+
32063213
LogicalResult bodyGenStatus = success();
32073214
using InsertPointTy = llvm::OpenMPIRBuilder::InsertPointTy;
32083215
auto bodyCB = [&](InsertPointTy allocaIP,
@@ -3270,14 +3277,12 @@ convertOmpTarget(Operation &opInst, llvm::IRBuilderBase &builder,
32703277
auto argAccessorCB = [&](llvm::Argument &arg, llvm::Value *input,
32713278
llvm::Value *&retVal, InsertPointTy allocaIP,
32723279
InsertPointTy codeGenIP) {
3273-
llvm::OpenMPIRBuilder *ompBuilder = moduleTranslation.getOpenMPBuilder();
3274-
32753280
// We just return the unaltered argument for the host function
32763281
// for now, some alterations may be required in the future to
32773282
// keep host fallback functions working identically to the device
32783283
// version (e.g. pass ByCopy values should be treated as such on
32793284
// host and device, currently not always the case)
3280-
if (!ompBuilder->Config.isTargetDevice()) {
3285+
if (!isTargetDevice) {
32813286
retVal = cast<llvm::Value>(&arg);
32823287
return codeGenIP;
32833288
}
@@ -3303,9 +3308,9 @@ convertOmpTarget(Operation &opInst, llvm::IRBuilderBase &builder,
33033308
moduleTranslation, dds);
33043309

33053310
builder.restoreIP(moduleTranslation.getOpenMPBuilder()->createTarget(
3306-
ompLoc, allocaIP, builder.saveIP(), entryInfo, defaultValTeams,
3307-
defaultValThreads, kernelInput, genMapInfoCB, bodyCB, argAccessorCB,
3308-
dds));
3311+
ompLoc, isOffloadEntry, allocaIP, builder.saveIP(), entryInfo,
3312+
defaultValTeams, defaultValThreads, kernelInput, genMapInfoCB, bodyCB,
3313+
argAccessorCB, dds));
33093314

33103315
// Remap access operations to declare target reference pointers for the
33113316
// device, essentially generating extra loadop's as necessary
@@ -3679,6 +3684,23 @@ LogicalResult OpenMPDialectLLVMIRTranslationInterface::amendOperation(
36793684
}
36803685
return failure();
36813686
})
3687+
.Case("omp.target_triples",
3688+
[&](Attribute attr) {
3689+
if (auto triplesAttr = dyn_cast<ArrayAttr>(attr)) {
3690+
llvm::OpenMPIRBuilderConfig &config =
3691+
moduleTranslation.getOpenMPBuilder()->Config;
3692+
config.TargetTriples.clear();
3693+
config.TargetTriples.reserve(triplesAttr.size());
3694+
for (Attribute tripleAttr : triplesAttr) {
3695+
if (auto tripleStrAttr = dyn_cast<StringAttr>(tripleAttr))
3696+
config.TargetTriples.emplace_back(tripleStrAttr.getValue());
3697+
else
3698+
return failure();
3699+
}
3700+
return success();
3701+
}
3702+
return failure();
3703+
})
36823704
.Default([](Attribute) {
36833705
// Fall through for omp attributes that do not require lowering.
36843706
return success();

‎mlir/test/Target/LLVMIR/omptarget-array-sectioning-host.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
// array bounds to lower to the full size of the array and the sectioned
88
// array to be the size of 3*3*1*element-byte-size (36 bytes in this case).
99

10-
module attributes {omp.is_target_device = false} {
10+
module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-amd-amdhsa"]} {
1111
llvm.func @_3d_target_array_section() {
1212
%0 = llvm.mlir.addressof @_QFEinarray : !llvm.ptr
1313
%1 = llvm.mlir.addressof @_QFEoutarray : !llvm.ptr

‎mlir/test/Target/LLVMIR/omptarget-byref-bycopy-generation-host.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
22

3-
module attributes {omp.is_target_device = false} {
3+
module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-amd-amdhsa"]} {
44
llvm.func @_QQmain() attributes {fir.bindc_name = "main"} {
55
%0 = llvm.mlir.addressof @_QFEi : !llvm.ptr
66
%1 = llvm.mlir.addressof @_QFEsp : !llvm.ptr

‎mlir/test/Target/LLVMIR/omptarget-depend.mlir

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,6 @@
11
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
2+
3+
module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-amd-amdhsa"]} {
24
llvm.func @_QQmain() attributes {fir.bindc_name = "main"} {
35
%0 = llvm.mlir.constant(39 : index) : i64
46
%1 = llvm.mlir.constant(0 : index) : i64
@@ -117,6 +119,7 @@
117119
llvm.call @_FortranAProgramEndStatement() {fastmathFlags = #llvm.fastmath<contract>} : () -> ()
118120
llvm.return %0 : i32
119121
}
122+
}
120123

121124
// %strucArg holds pointers to shared data.
122125
// CHECK: define void @_QQmain() {

‎mlir/test/Target/LLVMIR/omptarget-fortran-allocatable-types-host.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@
66
// alongside the omp.map.info, the test utilises mapping of array sections,
77
// full arrays and individual allocated scalars.
88

9-
module attributes {omp.is_target_device = false} {
9+
module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-amd-amdhsa"]} {
1010
llvm.func @_QQmain() {
1111
%0 = llvm.mlir.constant(5 : index) : i64
1212
%1 = llvm.mlir.constant(2 : index) : i64

‎mlir/test/Target/LLVMIR/omptarget-fortran-common-block-host.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
// to LLVM-IR from MLIR when a fortran common block is lowered alongside
66
// the omp.map.info.
77

8-
module attributes {omp.is_target_device = false} {
8+
module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-amd-amdhsa"]} {
99
llvm.func @omp_map_common_block_using_common_block_members() {
1010
%0 = llvm.mlir.constant(4 : index) : i64
1111
%1 = llvm.mlir.constant(0 : index) : i64

‎mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -7,7 +7,7 @@
77
// derived type) where members of both the nested and outer record type have
88
// members mapped.
99

10-
module attributes {omp.is_target_device = false} {
10+
module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-amd-amdhsa"]} {
1111
llvm.func @_QQmain() {
1212
%0 = llvm.mlir.constant(10 : index) : i64
1313
%1 = llvm.mlir.constant(4 : index) : i64

‎mlir/test/Target/LLVMIR/omptarget-record-type-mapping-host.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -6,7 +6,7 @@
66
// (C++/C class/structure, Fortran derived type) where only members of the record
77
// type are mapped.
88

9-
module attributes {omp.is_target_device = false} {
9+
module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-amd-amdhsa"]} {
1010
llvm.func @_QQmain() {
1111
%0 = llvm.mlir.constant(10 : index) : i64
1212
%1 = llvm.mlir.constant(4 : index) : i64

‎mlir/test/Target/LLVMIR/omptarget-region-host-only.mlir

Lines changed: 54 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,54 @@
1+
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
2+
3+
module attributes {omp.is_target_device = false} {
4+
llvm.func @omp_target_region_() {
5+
%0 = llvm.mlir.constant(20 : i32) : i32
6+
%1 = llvm.mlir.constant(10 : i32) : i32
7+
%2 = llvm.mlir.constant(1 : i64) : i64
8+
%3 = llvm.alloca %2 x i32 {bindc_name = "a", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEa"} : (i64) -> !llvm.ptr
9+
%4 = llvm.mlir.constant(1 : i64) : i64
10+
%5 = llvm.alloca %4 x i32 {bindc_name = "b", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEb"} : (i64) -> !llvm.ptr
11+
%6 = llvm.mlir.constant(1 : i64) : i64
12+
%7 = llvm.alloca %6 x i32 {bindc_name = "c", in_type = i32, operandSegmentSizes = array<i32: 0, 0>, uniq_name = "_QFomp_target_regionEc"} : (i64) -> !llvm.ptr
13+
llvm.store %1, %3 : i32, !llvm.ptr
14+
llvm.store %0, %5 : i32, !llvm.ptr
15+
%map1 = omp.map.info var_ptr(%3 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
16+
%map2 = omp.map.info var_ptr(%5 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
17+
%map3 = omp.map.info var_ptr(%7 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
18+
omp.target map_entries(%map1 -> %arg0, %map2 -> %arg1, %map3 -> %arg2 : !llvm.ptr, !llvm.ptr, !llvm.ptr) {
19+
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr):
20+
%8 = llvm.load %arg0 : !llvm.ptr -> i32
21+
%9 = llvm.load %arg1 : !llvm.ptr -> i32
22+
%10 = llvm.add %8, %9 : i32
23+
llvm.store %10, %arg2 : i32, !llvm.ptr
24+
omp.terminator
25+
}
26+
llvm.return
27+
}
28+
29+
llvm.func @omp_target_no_map() {
30+
omp.target {
31+
omp.terminator
32+
}
33+
llvm.return
34+
}
35+
}
36+
37+
// CHECK: define void @omp_target_region_()
38+
// CHECK-NOT: call i32 @__tgt_target_kernel({{.*}})
39+
// CHECK: call void @__omp_offloading_[[DEV:.*]]_[[FIL:.*]]_omp_target_region__l[[LINE1:.*]](ptr %{{.*}}, ptr %{{.*}}, ptr %{{.*}})
40+
// CHECK-NEXT: ret void
41+
42+
// CHECK: define void @omp_target_no_map()
43+
// CHECK-NOT: call i32 @__tgt_target_kernel({{.*}})
44+
// CHECK: call void @__omp_offloading_[[DEV]]_[[FIL]]_omp_target_no_map_l[[LINE2:.*]]()
45+
// CHECK-NEXT: ret void
46+
47+
// CHECK: define internal void @__omp_offloading_[[DEV]]_[[FIL]]_omp_target_region__l[[LINE1]](ptr %[[ADDR_A:.*]], ptr %[[ADDR_B:.*]], ptr %[[ADDR_C:.*]])
48+
// CHECK: %[[VAL_A:.*]] = load i32, ptr %[[ADDR_A]], align 4
49+
// CHECK: %[[VAL_B:.*]] = load i32, ptr %[[ADDR_B]], align 4
50+
// CHECK: %[[SUM:.*]] = add i32 %[[VAL_A]], %[[VAL_B]]
51+
// CHECK: store i32 %[[SUM]], ptr %[[ADDR_C]], align 4
52+
53+
// CHECK: define internal void @__omp_offloading_[[DEV]]_[[FIL]]_omp_target_no_map_l[[LINE2]]()
54+
// CHECK: ret void

‎mlir/test/Target/LLVMIR/omptarget-region-llvm.mlir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
// RUN: mlir-translate -mlir-to-llvmir %s | FileCheck %s
22

3-
module attributes {omp.is_target_device = false} {
3+
module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-amd-amdhsa"]} {
44
llvm.func @omp_target_region_() {
55
%0 = llvm.mlir.constant(20 : i32) : i32
66
%1 = llvm.mlir.constant(10 : i32) : i32

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