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Use getSameRatioLMUL
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+6
-31
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1 file changed

+6
-31
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llvm/lib/Target/RISCV/MCA/RISCVCustomBehaviour.cpp

Lines changed: 6 additions & 31 deletions
Original file line numberDiff line numberDiff line change
@@ -185,34 +185,8 @@ RISCVInstrumentManager::createInstruments(const MCInst &Inst) {
185185
return SmallVector<UniqueInstrument>();
186186
}
187187

188-
/// Return EMUL = (EEW / SEW) * LMUL
189-
inline static RISCVII::VLMUL
190-
getEMULEqualsEEWDivSEWTimesLMUL(unsigned EEW, unsigned SEW,
191-
RISCVII::VLMUL VLMUL) {
192-
bool IsScaleFrac = EEW < SEW;
193-
unsigned Scale = IsScaleFrac ? SEW / EEW : EEW / SEW;
194-
auto [LMUL, IsLMULFrac] = RISCVVType::decodeVLMUL(VLMUL);
195-
196-
unsigned EMUL;
197-
bool EMULFrac;
198-
if ((IsScaleFrac && IsLMULFrac) || (!IsScaleFrac && !IsLMULFrac)) {
199-
EMUL = LMUL * Scale;
200-
EMULFrac = IsLMULFrac;
201-
} else if (Scale > LMUL) {
202-
EMUL = Scale / LMUL;
203-
EMULFrac = IsScaleFrac;
204-
} else {
205-
EMUL = LMUL / Scale;
206-
EMULFrac = IsLMULFrac;
207-
}
208-
if (EMUL == 1)
209-
EMULFrac = false;
210-
211-
return RISCVVType::encodeLMUL(EMUL, EMULFrac);
212-
}
213-
214188
static std::pair<uint8_t, uint8_t>
215-
getEEWAndEMULForUnitStrideLoadStore(unsigned Opcode, uint8_t LMUL,
189+
getEEWAndEMULForUnitStrideLoadStore(unsigned Opcode, RISCVII::VLMUL LMUL,
216190
uint8_t SEW) {
217191
uint8_t EEW;
218192
switch (Opcode) {
@@ -238,9 +212,8 @@ getEEWAndEMULForUnitStrideLoadStore(unsigned Opcode, uint8_t LMUL,
238212
llvm_unreachable("Opcode is not a vector unit stride load nor store");
239213
}
240214

241-
RISCVII::VLMUL VLMUL = static_cast<RISCVII::VLMUL>(LMUL);
242-
uint8_t EMUL = static_cast<RISCVII::VLMUL>(
243-
getEMULEqualsEEWDivSEWTimesLMUL(EEW, SEW, VLMUL));
215+
uint8_t EMUL =
216+
static_cast<uint8_t>(RISCVVType::getSameRatioLMUL(SEW, LMUL, EEW));
244217
return std::make_pair(EEW, EMUL);
245218
}
246219

@@ -280,7 +253,9 @@ unsigned RISCVInstrumentManager::getSchedClassID(
280253
Opcode == RISCV::VLE16_V || Opcode == RISCV::VSE16_V ||
281254
Opcode == RISCV::VLE32_V || Opcode == RISCV::VSE32_V ||
282255
Opcode == RISCV::VLE64_V || Opcode == RISCV::VSE64_V) {
283-
auto [EEW, EMUL] = getEEWAndEMULForUnitStrideLoadStore(Opcode, LMUL, SEW);
256+
257+
RISCVII::VLMUL VLMUL = static_cast<RISCVII::VLMUL>(LMUL);
258+
auto [EEW, EMUL] = getEEWAndEMULForUnitStrideLoadStore(Opcode, VLMUL, SEW);
284259
RVV = RISCVVInversePseudosTable::getBaseInfo(Opcode, EMUL, EEW);
285260
} else {
286261
// Check if it depends on LMUL and SEW

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