Skip to content

Commit 90c1474

Browse files
tpearson-ssctpearson-ssc
authored
[SDAG] Honor signed arguments in floating point libcalls (#109134)
In ExpandFPLibCall, an assumption is made that all floating point libcalls that take integer arguments use unsigned integers. In the case of ldexp and frexp, this assumption is incorrect, leading to miscompilation and subsequent target-dependent incorrect operation. Indicate that ldexp and frexp utilize signed arguments in ExpandFPLibCall. Fixes #108904 Signed-off-by: Timothy Pearson <[email protected]>
1 parent d7c6e94 commit 90c1474

File tree

5 files changed

+96
-42
lines changed

5 files changed

+96
-42
lines changed

‎llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2205,7 +2205,8 @@ void SelectionDAGLegalize::ExpandFPLibCall(SDNode* Node,
22052205
Results.push_back(Tmp.first);
22062206
Results.push_back(Tmp.second);
22072207
} else {
2208-
SDValue Tmp = ExpandLibCall(LC, Node, false).first;
2208+
bool IsSignedArgument = Node->getOpcode() == ISD::FLDEXP;
2209+
SDValue Tmp = ExpandLibCall(LC, Node, IsSignedArgument).first;
22092210
Results.push_back(Tmp);
22102211
}
22112212
}

‎llvm/test/CodeGen/PowerPC/ldexp-libcall.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@ define float @call_ldexpf(float %a, i32 %b) {
1010
; CHECK-NEXT: std r0, 48(r1)
1111
; CHECK-NEXT: .cfi_def_cfa_offset 32
1212
; CHECK-NEXT: .cfi_offset lr, 16
13-
; CHECK-NEXT: clrldi r4, r4, 32
13+
; CHECK-NEXT: extsw r4, r4
1414
; CHECK-NEXT: bl ldexpf
1515
; CHECK-NEXT: nop
1616
; CHECK-NEXT: addi r1, r1, 32
@@ -29,7 +29,7 @@ define double @call_ldexp(double %a, i32 %b) {
2929
; CHECK-NEXT: std r0, 48(r1)
3030
; CHECK-NEXT: .cfi_def_cfa_offset 32
3131
; CHECK-NEXT: .cfi_offset lr, 16
32-
; CHECK-NEXT: clrldi r4, r4, 32
32+
; CHECK-NEXT: extsw r4, r4
3333
; CHECK-NEXT: bl ldexp
3434
; CHECK-NEXT: nop
3535
; CHECK-NEXT: addi r1, r1, 32

‎llvm/test/CodeGen/PowerPC/ldexp.ll

Lines changed: 21 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -57,22 +57,24 @@ define <2 x float> @ldexp_v2f32(<2 x float> %val, <2 x i32> %exp) {
5757
; CHECK-NEXT: .cfi_offset v29, -48
5858
; CHECK-NEXT: .cfi_offset v30, -32
5959
; CHECK-NEXT: .cfi_offset v31, -16
60-
; CHECK-NEXT: xxsldwi vs0, v2, v2, 3
6160
; CHECK-NEXT: li r3, 0
61+
; CHECK-NEXT: xxsldwi vs0, v2, v2, 3
6262
; CHECK-NEXT: stxv v29, 32(r1) # 16-byte Folded Spill
6363
; CHECK-NEXT: xscvspdpn f1, vs0
64-
; CHECK-NEXT: vextuwrx r4, r3, v3
64+
; CHECK-NEXT: vextuwrx r3, r3, v3
6565
; CHECK-NEXT: stxv v30, 48(r1) # 16-byte Folded Spill
6666
; CHECK-NEXT: stxv v31, 64(r1) # 16-byte Folded Spill
67+
; CHECK-NEXT: extsw r4, r3
6768
; CHECK-NEXT: vmr v31, v3
6869
; CHECK-NEXT: vmr v30, v2
6970
; CHECK-NEXT: bl ldexpf
7071
; CHECK-NEXT: nop
71-
; CHECK-NEXT: xxswapd vs0, v30
7272
; CHECK-NEXT: li r3, 4
73+
; CHECK-NEXT: xxswapd vs0, v30
7374
; CHECK-NEXT: xscvdpspn v29, f1
7475
; CHECK-NEXT: xscvspdpn f1, vs0
75-
; CHECK-NEXT: vextuwrx r4, r3, v31
76+
; CHECK-NEXT: vextuwrx r3, r3, v31
77+
; CHECK-NEXT: extsw r4, r3
7678
; CHECK-NEXT: bl ldexpf
7779
; CHECK-NEXT: nop
7880
; CHECK-NEXT: xscvdpspn vs0, f1
@@ -100,35 +102,39 @@ define <4 x float> @ldexp_v4f32(<4 x float> %val, <4 x i32> %exp) {
100102
; CHECK-NEXT: .cfi_offset v29, -48
101103
; CHECK-NEXT: .cfi_offset v30, -32
102104
; CHECK-NEXT: .cfi_offset v31, -16
103-
; CHECK-NEXT: li r3, 12
104-
; CHECK-NEXT: xscvspdpn f1, v2
105+
; CHECK-NEXT: li r3, 4
106+
; CHECK-NEXT: xxswapd vs0, v2
105107
; CHECK-NEXT: stxv v28, 32(r1) # 16-byte Folded Spill
108+
; CHECK-NEXT: xscvspdpn f1, vs0
109+
; CHECK-NEXT: vextuwrx r3, r3, v3
106110
; CHECK-NEXT: stxv v29, 48(r1) # 16-byte Folded Spill
107111
; CHECK-NEXT: stxv v30, 64(r1) # 16-byte Folded Spill
108112
; CHECK-NEXT: stxv v31, 80(r1) # 16-byte Folded Spill
109113
; CHECK-NEXT: vmr v31, v3
114+
; CHECK-NEXT: extsw r4, r3
110115
; CHECK-NEXT: vmr v30, v2
111-
; CHECK-NEXT: vextuwrx r4, r3, v3
112116
; CHECK-NEXT: bl ldexpf
113117
; CHECK-NEXT: nop
114-
; CHECK-NEXT: xxswapd vs0, v30
115-
; CHECK-NEXT: li r3, 4
118+
; CHECK-NEXT: li r3, 12
116119
; CHECK-NEXT: xscpsgndp v29, f1, f1
117-
; CHECK-NEXT: xscvspdpn f1, vs0
118-
; CHECK-NEXT: vextuwrx r4, r3, v31
120+
; CHECK-NEXT: xscvspdpn f1, v30
121+
; CHECK-NEXT: vextuwrx r3, r3, v31
122+
; CHECK-NEXT: extsw r4, r3
119123
; CHECK-NEXT: bl ldexpf
120124
; CHECK-NEXT: nop
121-
; CHECK-NEXT: xxmrghd vs0, v29, vs1
125+
; CHECK-NEXT: xxmrghd vs0, vs1, v29
122126
; CHECK-NEXT: li r3, 0
123-
; CHECK-NEXT: vextuwrx r4, r3, v31
127+
; CHECK-NEXT: vextuwrx r3, r3, v31
124128
; CHECK-NEXT: xvcvdpsp v28, vs0
125129
; CHECK-NEXT: xxsldwi vs0, v30, v30, 3
130+
; CHECK-NEXT: extsw r4, r3
126131
; CHECK-NEXT: xscvspdpn f1, vs0
127132
; CHECK-NEXT: bl ldexpf
128133
; CHECK-NEXT: nop
129134
; CHECK-NEXT: xxsldwi vs0, v30, v30, 1
135+
; CHECK-NEXT: mfvsrwz r3, v31
130136
; CHECK-NEXT: xscpsgndp v29, f1, f1
131-
; CHECK-NEXT: mfvsrwz r4, v31
137+
; CHECK-NEXT: extsw r4, r3
132138
; CHECK-NEXT: xscvspdpn f1, vs0
133139
; CHECK-NEXT: bl ldexpf
134140
; CHECK-NEXT: nop
@@ -156,7 +162,7 @@ define half @ldexp_f16(half %arg0, i32 %arg1) {
156162
; CHECK-NEXT: .cfi_def_cfa_offset 32
157163
; CHECK-NEXT: .cfi_offset lr, 16
158164
; CHECK-NEXT: xscvdphp f0, f1
159-
; CHECK-NEXT: clrldi r4, r4, 32
165+
; CHECK-NEXT: extsw r4, r4
160166
; CHECK-NEXT: mffprwz r3, f0
161167
; CHECK-NEXT: clrlwi r3, r3, 16
162168
; CHECK-NEXT: mtfprwz f0, r3

‎llvm/test/CodeGen/PowerPC/negative-integer-fp-libcall.ll

Lines changed: 26 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,26 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2+
; RUN: llc -O1 -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
3+
4+
; Test that a negative parameter smaller than 64 bits (e.g., int)
5+
; is correctly implemented with sign-extension when passed to
6+
; a floating point libcall.
7+
8+
define double @ldexp_test(ptr %a, ptr %b) nounwind {
9+
; CHECK-LABEL: ldexp_test:
10+
; CHECK: # %bb.0:
11+
; CHECK-NEXT: mflr 0
12+
; CHECK-NEXT: stdu 1, -112(1)
13+
; CHECK-NEXT: std 0, 128(1)
14+
; CHECK-NEXT: lfd 1, 0(3)
15+
; CHECK-NEXT: lwa 4, 0(4)
16+
; CHECK-NEXT: bl ldexp
17+
; CHECK-NEXT: nop
18+
; CHECK-NEXT: addi 1, 1, 112
19+
; CHECK-NEXT: ld 0, 16(1)
20+
; CHECK-NEXT: mtlr 0
21+
; CHECK-NEXT: blr
22+
%base = load double, ptr %a
23+
%exp = load i32, ptr %b
24+
%call = call double @llvm.ldexp.f64.i32(double %base, i32 signext %exp)
25+
ret double %call
26+
}

‎llvm/test/CodeGen/X86/fold-int-pow2-with-fmul-or-fdiv.ll

Lines changed: 45 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -406,27 +406,31 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
406406
; CHECK-SSE-NEXT: subq $72, %rsp
407407
; CHECK-SSE-NEXT: .cfi_def_cfa_offset 80
408408
; CHECK-SSE-NEXT: movdqa %xmm0, (%rsp) # 16-byte Spill
409-
; CHECK-SSE-NEXT: pextrw $7, %xmm0, %edi
409+
; CHECK-SSE-NEXT: pextrw $7, %xmm0, %eax
410+
; CHECK-SSE-NEXT: movswl %ax, %edi
410411
; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
411412
; CHECK-SSE-NEXT: callq ldexpf@PLT
412413
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
413414
; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
414415
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
415-
; CHECK-SSE-NEXT: pextrw $6, %xmm0, %edi
416+
; CHECK-SSE-NEXT: pextrw $6, %xmm0, %eax
417+
; CHECK-SSE-NEXT: movswl %ax, %edi
416418
; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
417419
; CHECK-SSE-NEXT: callq ldexpf@PLT
418420
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
419421
; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
420422
; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
421423
; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
422424
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
423-
; CHECK-SSE-NEXT: pextrw $5, %xmm0, %edi
425+
; CHECK-SSE-NEXT: pextrw $5, %xmm0, %eax
426+
; CHECK-SSE-NEXT: movswl %ax, %edi
424427
; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
425428
; CHECK-SSE-NEXT: callq ldexpf@PLT
426429
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
427430
; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
428431
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
429-
; CHECK-SSE-NEXT: pextrw $4, %xmm0, %edi
432+
; CHECK-SSE-NEXT: pextrw $4, %xmm0, %eax
433+
; CHECK-SSE-NEXT: movswl %ax, %edi
430434
; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
431435
; CHECK-SSE-NEXT: callq ldexpf@PLT
432436
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
@@ -436,28 +440,31 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
436440
; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
437441
; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
438442
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
439-
; CHECK-SSE-NEXT: pextrw $3, %xmm0, %edi
443+
; CHECK-SSE-NEXT: pextrw $3, %xmm0, %eax
444+
; CHECK-SSE-NEXT: movswl %ax, %edi
440445
; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
441446
; CHECK-SSE-NEXT: callq ldexpf@PLT
442447
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
443448
; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
444449
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
445-
; CHECK-SSE-NEXT: pextrw $2, %xmm0, %edi
450+
; CHECK-SSE-NEXT: pextrw $2, %xmm0, %eax
451+
; CHECK-SSE-NEXT: movswl %ax, %edi
446452
; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
447453
; CHECK-SSE-NEXT: callq ldexpf@PLT
448454
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
449455
; CHECK-SSE-NEXT: punpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 16-byte Folded Reload
450456
; CHECK-SSE-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
451457
; CHECK-SSE-NEXT: movdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
452458
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
453-
; CHECK-SSE-NEXT: pextrw $1, %xmm0, %edi
459+
; CHECK-SSE-NEXT: pextrw $1, %xmm0, %eax
460+
; CHECK-SSE-NEXT: movswl %ax, %edi
454461
; CHECK-SSE-NEXT: movss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
455462
; CHECK-SSE-NEXT: callq ldexpf@PLT
456463
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
457464
; CHECK-SSE-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
458465
; CHECK-SSE-NEXT: movdqa (%rsp), %xmm0 # 16-byte Reload
459466
; CHECK-SSE-NEXT: movd %xmm0, %eax
460-
; CHECK-SSE-NEXT: movzwl %ax, %edi
467+
; CHECK-SSE-NEXT: movswl %ax, %edi
461468
; CHECK-SSE-NEXT: movd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
462469
; CHECK-SSE-NEXT: callq ldexpf@PLT
463470
; CHECK-SSE-NEXT: callq __truncsfhf2@PLT
@@ -476,27 +483,31 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
476483
; CHECK-AVX2-NEXT: subq $72, %rsp
477484
; CHECK-AVX2-NEXT: .cfi_def_cfa_offset 80
478485
; CHECK-AVX2-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
479-
; CHECK-AVX2-NEXT: vpextrw $7, %xmm0, %edi
486+
; CHECK-AVX2-NEXT: vpextrw $7, %xmm0, %eax
487+
; CHECK-AVX2-NEXT: movswl %ax, %edi
480488
; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
481489
; CHECK-AVX2-NEXT: callq ldexpf@PLT
482490
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
483491
; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
484492
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
485-
; CHECK-AVX2-NEXT: vpextrw $6, %xmm0, %edi
493+
; CHECK-AVX2-NEXT: vpextrw $6, %xmm0, %eax
494+
; CHECK-AVX2-NEXT: movswl %ax, %edi
486495
; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
487496
; CHECK-AVX2-NEXT: callq ldexpf@PLT
488497
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
489498
; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
490499
; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
491500
; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
492501
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
493-
; CHECK-AVX2-NEXT: vpextrw $5, %xmm0, %edi
502+
; CHECK-AVX2-NEXT: vpextrw $5, %xmm0, %eax
503+
; CHECK-AVX2-NEXT: movswl %ax, %edi
494504
; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
495505
; CHECK-AVX2-NEXT: callq ldexpf@PLT
496506
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
497507
; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
498508
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
499-
; CHECK-AVX2-NEXT: vpextrw $4, %xmm0, %edi
509+
; CHECK-AVX2-NEXT: vpextrw $4, %xmm0, %eax
510+
; CHECK-AVX2-NEXT: movswl %ax, %edi
500511
; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
501512
; CHECK-AVX2-NEXT: callq ldexpf@PLT
502513
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
@@ -506,28 +517,31 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
506517
; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
507518
; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
508519
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
509-
; CHECK-AVX2-NEXT: vpextrw $3, %xmm0, %edi
520+
; CHECK-AVX2-NEXT: vpextrw $3, %xmm0, %eax
521+
; CHECK-AVX2-NEXT: movswl %ax, %edi
510522
; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
511523
; CHECK-AVX2-NEXT: callq ldexpf@PLT
512524
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
513525
; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
514526
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
515-
; CHECK-AVX2-NEXT: vpextrw $2, %xmm0, %edi
527+
; CHECK-AVX2-NEXT: vpextrw $2, %xmm0, %eax
528+
; CHECK-AVX2-NEXT: movswl %ax, %edi
516529
; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
517530
; CHECK-AVX2-NEXT: callq ldexpf@PLT
518531
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
519532
; CHECK-AVX2-NEXT: vpunpcklwd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 16-byte Folded Reload
520533
; CHECK-AVX2-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
521534
; CHECK-AVX2-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
522535
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
523-
; CHECK-AVX2-NEXT: vpextrw $1, %xmm0, %edi
536+
; CHECK-AVX2-NEXT: vpextrw $1, %xmm0, %eax
537+
; CHECK-AVX2-NEXT: movswl %ax, %edi
524538
; CHECK-AVX2-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
525539
; CHECK-AVX2-NEXT: callq ldexpf@PLT
526540
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
527541
; CHECK-AVX2-NEXT: vmovaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
528542
; CHECK-AVX2-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
529543
; CHECK-AVX2-NEXT: vmovd %xmm0, %eax
530-
; CHECK-AVX2-NEXT: movzwl %ax, %edi
544+
; CHECK-AVX2-NEXT: movswl %ax, %edi
531545
; CHECK-AVX2-NEXT: vmovd {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
532546
; CHECK-AVX2-NEXT: callq ldexpf@PLT
533547
; CHECK-AVX2-NEXT: callq __truncsfhf2@PLT
@@ -546,15 +560,17 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
546560
; CHECK-AVX512F-NEXT: subq $72, %rsp
547561
; CHECK-AVX512F-NEXT: .cfi_def_cfa_offset 80
548562
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, (%rsp) # 16-byte Spill
549-
; CHECK-AVX512F-NEXT: vpextrw $7, %xmm0, %edi
563+
; CHECK-AVX512F-NEXT: vpextrw $7, %xmm0, %eax
564+
; CHECK-AVX512F-NEXT: movswl %ax, %edi
550565
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
551566
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
552567
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
553568
; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
554569
; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
555570
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
556571
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
557-
; CHECK-AVX512F-NEXT: vpextrw $6, %xmm0, %edi
572+
; CHECK-AVX512F-NEXT: vpextrw $6, %xmm0, %eax
573+
; CHECK-AVX512F-NEXT: movswl %ax, %edi
558574
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
559575
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
560576
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
@@ -564,15 +580,17 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
564580
; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
565581
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
566582
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
567-
; CHECK-AVX512F-NEXT: vpextrw $5, %xmm0, %edi
583+
; CHECK-AVX512F-NEXT: vpextrw $5, %xmm0, %eax
584+
; CHECK-AVX512F-NEXT: movswl %ax, %edi
568585
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
569586
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
570587
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
571588
; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
572589
; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
573590
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
574591
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
575-
; CHECK-AVX512F-NEXT: vpextrw $4, %xmm0, %edi
592+
; CHECK-AVX512F-NEXT: vpextrw $4, %xmm0, %eax
593+
; CHECK-AVX512F-NEXT: movswl %ax, %edi
576594
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
577595
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
578596
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
@@ -584,15 +602,17 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
584602
; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1]
585603
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
586604
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
587-
; CHECK-AVX512F-NEXT: vpextrw $3, %xmm0, %edi
605+
; CHECK-AVX512F-NEXT: vpextrw $3, %xmm0, %eax
606+
; CHECK-AVX512F-NEXT: movswl %ax, %edi
588607
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
589608
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
590609
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
591610
; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
592611
; CHECK-AVX512F-NEXT: vpinsrw $0, %eax, %xmm0, %xmm0
593612
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
594613
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
595-
; CHECK-AVX512F-NEXT: vpextrw $2, %xmm0, %edi
614+
; CHECK-AVX512F-NEXT: vpextrw $2, %xmm0, %eax
615+
; CHECK-AVX512F-NEXT: movswl %ax, %edi
596616
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
597617
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
598618
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
@@ -602,7 +622,8 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
602622
; CHECK-AVX512F-NEXT: # xmm0 = xmm0[0],mem[0],xmm0[1],mem[1],xmm0[2],mem[2],xmm0[3],mem[3]
603623
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
604624
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
605-
; CHECK-AVX512F-NEXT: vpextrw $1, %xmm0, %edi
625+
; CHECK-AVX512F-NEXT: vpextrw $1, %xmm0, %eax
626+
; CHECK-AVX512F-NEXT: movswl %ax, %edi
606627
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
607628
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
608629
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0
@@ -611,7 +632,7 @@ define <8 x half> @fmul_pow2_ldexp_8xhalf(<8 x i16> %i) {
611632
; CHECK-AVX512F-NEXT: vmovdqa %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
612633
; CHECK-AVX512F-NEXT: vmovdqa (%rsp), %xmm0 # 16-byte Reload
613634
; CHECK-AVX512F-NEXT: vmovd %xmm0, %eax
614-
; CHECK-AVX512F-NEXT: movzwl %ax, %edi
635+
; CHECK-AVX512F-NEXT: movswl %ax, %edi
615636
; CHECK-AVX512F-NEXT: vmovss {{.*#+}} xmm0 = [8.192E+3,0.0E+0,0.0E+0,0.0E+0]
616637
; CHECK-AVX512F-NEXT: callq ldexpf@PLT
617638
; CHECK-AVX512F-NEXT: vcvtps2ph $4, %xmm0, %xmm0

0 commit comments

Comments
 (0)