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1 parent 16cc248 commit 91851d0Copy full SHA for 91851d0
mlir/test/Target/LLVMIR/Import/intrinsic.ll
@@ -878,14 +878,6 @@ define float @ssa_copy(float %0) {
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ret float %2
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}
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-; CHECK-LABEL: llvm.func @nvvm
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-define void @nvvm() {
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- ; CHECK: %{{.*}} = nvvm.read.ptx.sreg.ntid.x : i32
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- %1 = call i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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- ret void
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-}
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-
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-declare i32 @llvm.nvvm.read.ptx.sreg.ntid.x()
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declare float @llvm.fmuladd.f32(float, float, float)
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declare <8 x float> @llvm.fmuladd.v8f32(<8 x float>, <8 x float>, <8 x float>)
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declare float @llvm.fma.f32(float, float, float)
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