Fix clipr and clipur according to the specification update.

pascalgouedo/cv32e40p@5c9a14d

Author: realqhc

llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td

@@ -675,11 +675,12 @@ def CV_HI5: SDNodeXForm<imm, [{
                                    N->getValueType(0));
 }]>;
 
-def positiveGPR : ImmLeaf<XLenVT, [{return (uint32_t)Imm >> 31 == 0;}]>;
+def positive : PatFrags<(ops node:$value),
+                        [(abs node:$value), (and node:$value, 0x7FFFFFFF),
+                         (lshr (shl node:$value, (XLenVT 1)), (XLenVT 1)]>;
 def between : PatFrags<(ops node:$lowerBound, node:$upperBound, node:$value),
                        [(smin (smax node:$value, node:$lowerBound), node:$upperBound),
                         (smax (smin node:$value, node:$upperBound), node:$lowerBound)]>;
-
 def betweenu : PatFrags<(ops node:$upperBound, node:$value),
                         [(smin (smax node:$value, 0), node:$upperBound),
                          (smax (smin node:$value, node:$upperBound), 0)]>;
@@ -789,11 +790,11 @@ let Predicates = [HasVendorXCValu, IsRV32], AddedComplexity = 1 in {
 
   def : Pat<(clip powerOf2Minus1:$upperBound, (XLenVT GPR:$rs1)),
             (CV_CLIP GPR:$rs1, (trailing1sPlus1 imm:$upperBound))>;
-  def : Pat<(between (not positiveGPR:$rs2), positiveGPR:$rs2, (XLenVT GPR:$rs1)),
+  def : Pat<(between (not (positive GPR:$rs2)), (positive GPR:$rs2), (XLenVT GPR:$rs1)),
             (CV_CLIPR GPR:$rs1, GPR:$rs2)>;
   def : Pat<(betweenu powerOf2Minus1:$upperBound, (XLenVT GPR:$rs1)),
             (CV_CLIPU GPR:$rs1, (trailing1sPlus1 imm:$upperBound))>;
-  def : Pat<(betweenu GPR:$rs2, (XLenVT GPR:$rs1)),
+  def : Pat<(betweenu (positive GPR:$rs2), (XLenVT GPR:$rs1)),
             (CV_CLIPUR GPR:$rs1, GPR:$rs2)>;
 
   def : Pat<(sra (add (XLenVT GPR:$rs1), (XLenVT GPR:$rs2)), uimm5:$imm5),

llvm/test/CodeGen/RISCV/xcvalu.ll

@@ -124,14 +124,23 @@ define i32 @clip(i32 %a) {
 define i32 @clipr(i32 %a, i32 %b) {
 ; CHECK-LABEL: clipr:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    cv.abs a1, a1
-; CHECK-NEXT:    not a0, a1
-; CHECK-NEXT:    cv.max a0, a1, a0
-; CHECK-NEXT:    cv.min a0, a0, a1
+; CHECK-NEXT:    cv.clipr a0, a0, a1
 ; CHECK-NEXT:    ret
   %1 = call i32 @llvm.abs.i32(i32 %b, i1 false)
   %2 = xor i32 %1, -1
-  %3 = call i32 @llvm.smax.i32(i32 %1, i32 %2)
+  %3 = call i32 @llvm.smax.i32(i32 %a, i32 %2)
+  %4 = call i32 @llvm.smin.i32(i32 %3, i32 %1)
+  ret i32 %4
+}
+
+define i32 @clipr2(i32 %a, i32 %b) {
+; CHECK-LABEL: clipr2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    cv.clipr a0, a0, a1
+; CHECK-NEXT:    ret
+  %1 = and i32 %b, 2147483647
+  %2 = xor i32 %1, -1
+  %3 = call i32 @llvm.smax.i32(i32 %a, i32 %2)
   %4 = call i32 @llvm.smin.i32(i32 %3, i32 %1)
   ret i32 %4
 }
@@ -151,9 +160,21 @@ define i32 @clipur(i32 %a, i32 %b) {
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    cv.clipur a0, a0, a1
 ; CHECK-NEXT:    ret
-  %1 = call i32 @llvm.smax.i32(i32 %a, i32 0)
-  %2 = call i32 @llvm.smin.i32(i32 %1, i32 %b)
-  ret i32 %2
+  %1 = call i32 @llvm.abs.i32(i32 %b, i1 false)
+  %2 = call i32 @llvm.smax.i32(i32 %a, i32 0)
+  %3 = call i32 @llvm.smin.i32(i32 %2, i32 %1)
+  ret i32 %3
+}
+
+define i32 @clipur2(i32 %a, i32 %b) {
+; CHECK-LABEL: clipur2:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    cv.clipur a0, a0, a1
+; CHECK-NEXT:    ret
+  %1 = and i32 %b, 2147483647
+  %2 = call i32 @llvm.smax.i32(i32 %a, i32 0)
+  %3 = call i32 @llvm.smin.i32(i32 %2, i32 %1)
+  ret i32 %3
 }
 
 define i32 @addN(i32 %a, i32 %b) {