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[X86] v2f32.ll - replace X32 check prefixes with X86 (and add common CHECK prefix)
We try to only use X32 for gnux32 triple tests.
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llvm/test/CodeGen/X86/v2f32.ll

Lines changed: 35 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2-
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -o - | FileCheck %s --check-prefix=X64
3-
; RUN: llc < %s -mcpu=yonah -mtriple=i386-linux-gnu -o - | FileCheck %s --check-prefix=X32
2+
; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn | FileCheck %s --check-prefixes=CHECK,X64
3+
; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=yonah | FileCheck %s --check-prefixes=CHECK,X86
44

55
; PR7518
66
define void @test1(<2 x float> %Q, ptr%P2) nounwind {
@@ -11,13 +11,13 @@ define void @test1(<2 x float> %Q, ptr%P2) nounwind {
1111
; X64-NEXT: movss %xmm1, (%rdi)
1212
; X64-NEXT: retq
1313
;
14-
; X32-LABEL: test1:
15-
; X32: # %bb.0:
16-
; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
17-
; X32-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
18-
; X32-NEXT: addss %xmm0, %xmm1
19-
; X32-NEXT: movss %xmm1, (%eax)
20-
; X32-NEXT: retl
14+
; X86-LABEL: test1:
15+
; X86: # %bb.0:
16+
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
17+
; X86-NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
18+
; X86-NEXT: addss %xmm0, %xmm1
19+
; X86-NEXT: movss %xmm1, (%eax)
20+
; X86-NEXT: retl
2121
%a = extractelement <2 x float> %Q, i32 0
2222
%b = extractelement <2 x float> %Q, i32 1
2323
%c = fadd float %a, %b
@@ -26,68 +26,47 @@ define void @test1(<2 x float> %Q, ptr%P2) nounwind {
2626
}
2727

2828
define <2 x float> @test2(<2 x float> %Q, <2 x float> %R, ptr%P) nounwind {
29-
; X64-LABEL: test2:
30-
; X64: # %bb.0:
31-
; X64-NEXT: addps %xmm1, %xmm0
32-
; X64-NEXT: retq
33-
;
34-
; X32-LABEL: test2:
35-
; X32: # %bb.0:
36-
; X32-NEXT: addps %xmm1, %xmm0
37-
; X32-NEXT: retl
29+
; CHECK-LABEL: test2:
30+
; CHECK: # %bb.0:
31+
; CHECK-NEXT: addps %xmm1, %xmm0
32+
; CHECK-NEXT: ret{{[l|q]}}
3833
%Z = fadd <2 x float> %Q, %R
3934
ret <2 x float> %Z
4035
}
4136

4237
define <2 x float> @test3(<4 x float> %A) nounwind {
43-
; X64-LABEL: test3:
44-
; X64: # %bb.0:
45-
; X64-NEXT: addps %xmm0, %xmm0
46-
; X64-NEXT: retq
47-
;
48-
; X32-LABEL: test3:
49-
; X32: # %bb.0:
50-
; X32-NEXT: addps %xmm0, %xmm0
51-
; X32-NEXT: retl
52-
%B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
53-
%C = fadd <2 x float> %B, %B
54-
ret <2 x float> %C
38+
; CHECK-LABEL: test3:
39+
; CHECK: # %bb.0:
40+
; CHECK-NEXT: addps %xmm0, %xmm0
41+
; CHECK-NEXT: ret{{[l|q]}}
42+
%B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
43+
%C = fadd <2 x float> %B, %B
44+
ret <2 x float> %C
5545
}
5646

5747
define <2 x float> @test4(<2 x float> %A) nounwind {
58-
; X64-LABEL: test4:
59-
; X64: # %bb.0:
60-
; X64-NEXT: addps %xmm0, %xmm0
61-
; X64-NEXT: retq
62-
;
63-
; X32-LABEL: test4:
64-
; X32: # %bb.0:
65-
; X32-NEXT: addps %xmm0, %xmm0
66-
; X32-NEXT: retl
67-
%C = fadd <2 x float> %A, %A
68-
ret <2 x float> %C
48+
; CHECK-LABEL: test4:
49+
; CHECK: # %bb.0:
50+
; CHECK-NEXT: addps %xmm0, %xmm0
51+
; CHECK-NEXT: ret{{[l|q]}}
52+
%C = fadd <2 x float> %A, %A
53+
ret <2 x float> %C
6954
}
7055

7156
define <4 x float> @test5(<4 x float> %A) nounwind {
72-
; X64-LABEL: test5:
73-
; X64: # %bb.0:
74-
; X64-NEXT: addps %xmm0, %xmm0
75-
; X64-NEXT: addps %xmm0, %xmm0
76-
; X64-NEXT: retq
77-
;
78-
; X32-LABEL: test5:
79-
; X32: # %bb.0:
80-
; X32-NEXT: addps %xmm0, %xmm0
81-
; X32-NEXT: addps %xmm0, %xmm0
82-
; X32-NEXT: retl
83-
%B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
84-
%C = fadd <2 x float> %B, %B
57+
; CHECK-LABEL: test5:
58+
; CHECK: # %bb.0:
59+
; CHECK-NEXT: addps %xmm0, %xmm0
60+
; CHECK-NEXT: addps %xmm0, %xmm0
61+
; CHECK-NEXT: ret{{[l|q]}}
62+
%B = shufflevector <4 x float> %A, <4 x float> undef, <2 x i32> <i32 0, i32 1>
63+
%C = fadd <2 x float> %B, %B
8564
br label %BB
8665

8766
BB:
8867
%D = fadd <2 x float> %C, %C
89-
%E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
90-
ret <4 x float> %E
68+
%E = shufflevector <2 x float> %D, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
69+
ret <4 x float> %E
9170
}
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9372

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