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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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- ; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn -o - | FileCheck %s --check-prefix= X64
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- ; RUN: llc < %s -mcpu=yonah - mtriple=i386-linux-gnu -o - | FileCheck %s --check-prefix=X32
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+ ; RUN: llc < %s -mtriple=x86_64-linux -mcpu=penryn | FileCheck %s --check-prefixes=CHECK, X64
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+ ; RUN: llc < %s -mtriple=i386-linux-gnu -mcpu=yonah | FileCheck %s --check-prefixes=CHECK,X86
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; PR7518
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define void @test1 (<2 x float > %Q , ptr %P2 ) nounwind {
@@ -11,13 +11,13 @@ define void @test1(<2 x float> %Q, ptr%P2) nounwind {
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; X64-NEXT: movss %xmm1, (%rdi)
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; X64-NEXT: retq
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;
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- ; X32 -LABEL: test1:
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- ; X32 : # %bb.0:
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- ; X32 -NEXT: movl {{[0-9]+}}(%esp), %eax
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- ; X32 -NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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- ; X32 -NEXT: addss %xmm0, %xmm1
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- ; X32 -NEXT: movss %xmm1, (%eax)
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- ; X32 -NEXT: retl
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+ ; X86 -LABEL: test1:
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+ ; X86 : # %bb.0:
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+ ; X86 -NEXT: movl {{[0-9]+}}(%esp), %eax
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+ ; X86 -NEXT: movshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
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+ ; X86 -NEXT: addss %xmm0, %xmm1
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+ ; X86 -NEXT: movss %xmm1, (%eax)
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+ ; X86 -NEXT: retl
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%a = extractelement <2 x float > %Q , i32 0
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%b = extractelement <2 x float > %Q , i32 1
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%c = fadd float %a , %b
@@ -26,68 +26,47 @@ define void @test1(<2 x float> %Q, ptr%P2) nounwind {
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}
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define <2 x float > @test2 (<2 x float > %Q , <2 x float > %R , ptr %P ) nounwind {
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- ; X64-LABEL: test2:
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- ; X64: # %bb.0:
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- ; X64-NEXT: addps %xmm1, %xmm0
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- ; X64-NEXT: retq
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- ;
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- ; X32-LABEL: test2:
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- ; X32: # %bb.0:
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- ; X32-NEXT: addps %xmm1, %xmm0
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- ; X32-NEXT: retl
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+ ; CHECK-LABEL: test2:
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+ ; CHECK: # %bb.0:
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+ ; CHECK-NEXT: addps %xmm1, %xmm0
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+ ; CHECK-NEXT: ret{{[l|q]}}
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%Z = fadd <2 x float > %Q , %R
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ret <2 x float > %Z
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}
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define <2 x float > @test3 (<4 x float > %A ) nounwind {
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- ; X64-LABEL: test3:
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- ; X64: # %bb.0:
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- ; X64-NEXT: addps %xmm0, %xmm0
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- ; X64-NEXT: retq
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- ;
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- ; X32-LABEL: test3:
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- ; X32: # %bb.0:
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- ; X32-NEXT: addps %xmm0, %xmm0
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- ; X32-NEXT: retl
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- %B = shufflevector <4 x float > %A , <4 x float > undef , <2 x i32 > <i32 0 , i32 1 >
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- %C = fadd <2 x float > %B , %B
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- ret <2 x float > %C
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+ ; CHECK-LABEL: test3:
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+ ; CHECK: # %bb.0:
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+ ; CHECK-NEXT: addps %xmm0, %xmm0
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+ ; CHECK-NEXT: ret{{[l|q]}}
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+ %B = shufflevector <4 x float > %A , <4 x float > undef , <2 x i32 > <i32 0 , i32 1 >
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+ %C = fadd <2 x float > %B , %B
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+ ret <2 x float > %C
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}
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define <2 x float > @test4 (<2 x float > %A ) nounwind {
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- ; X64-LABEL: test4:
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- ; X64: # %bb.0:
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- ; X64-NEXT: addps %xmm0, %xmm0
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- ; X64-NEXT: retq
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- ;
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- ; X32-LABEL: test4:
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- ; X32: # %bb.0:
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- ; X32-NEXT: addps %xmm0, %xmm0
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- ; X32-NEXT: retl
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- %C = fadd <2 x float > %A , %A
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- ret <2 x float > %C
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+ ; CHECK-LABEL: test4:
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+ ; CHECK: # %bb.0:
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+ ; CHECK-NEXT: addps %xmm0, %xmm0
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+ ; CHECK-NEXT: ret{{[l|q]}}
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+ %C = fadd <2 x float > %A , %A
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+ ret <2 x float > %C
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}
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define <4 x float > @test5 (<4 x float > %A ) nounwind {
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- ; X64-LABEL: test5:
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- ; X64: # %bb.0:
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- ; X64-NEXT: addps %xmm0, %xmm0
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- ; X64-NEXT: addps %xmm0, %xmm0
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- ; X64-NEXT: retq
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- ;
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- ; X32-LABEL: test5:
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- ; X32: # %bb.0:
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- ; X32-NEXT: addps %xmm0, %xmm0
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- ; X32-NEXT: addps %xmm0, %xmm0
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- ; X32-NEXT: retl
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- %B = shufflevector <4 x float > %A , <4 x float > undef , <2 x i32 > <i32 0 , i32 1 >
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- %C = fadd <2 x float > %B , %B
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+ ; CHECK-LABEL: test5:
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+ ; CHECK: # %bb.0:
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+ ; CHECK-NEXT: addps %xmm0, %xmm0
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+ ; CHECK-NEXT: addps %xmm0, %xmm0
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+ ; CHECK-NEXT: ret{{[l|q]}}
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+ %B = shufflevector <4 x float > %A , <4 x float > undef , <2 x i32 > <i32 0 , i32 1 >
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+ %C = fadd <2 x float > %B , %B
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br label %BB
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BB:
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%D = fadd <2 x float > %C , %C
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- %E = shufflevector <2 x float > %D , <2 x float > undef , <4 x i32 > <i32 0 , i32 1 , i32 undef , i32 undef >
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- ret <4 x float > %E
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+ %E = shufflevector <2 x float > %D , <2 x float > undef , <4 x i32 > <i32 0 , i32 1 , i32 undef , i32 undef >
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+ ret <4 x float > %E
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}
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