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[DebugInfo/MIR] Convert tests to opaque pointers (NFC)
Link: https://discourse.llvm.org/t/enabling-opaque-pointers-by-default/61322
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‎llvm/test/DebugInfo/MIR/AArch64/clobber-sp.mir

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -32,16 +32,16 @@
3232
entry:
3333
%x.addr = alloca i32, align 4
3434
tail call void @llvm.dbg.value(metadata i32 %x, i64 0, metadata !19, metadata !22), !dbg !23
35-
store i32 %x, i32* %x.addr, align 4, !tbaa !24
35+
store i32 %x, ptr %x.addr, align 4, !tbaa !24
3636
tail call void @llvm.dbg.value(metadata i32 %y, i64 0, metadata !20, metadata !22), !dbg !28
37-
tail call void @llvm.dbg.declare(metadata %struct.Rect* undef, metadata !21, metadata !22), !dbg !29
37+
tail call void @llvm.dbg.declare(metadata ptr undef, metadata !21, metadata !22), !dbg !29
3838
tail call void @g([4 x double] %s.coerce) #4, !dbg !30
3939
%tobool = icmp eq i32 %y, 0, !dbg !31
4040
br i1 %tobool, label %if.end, label %if.then, !dbg !33
4141

4242
if.then: ; preds = %entry
43-
tail call void @llvm.dbg.value(metadata i32* %x.addr, i64 0, metadata !19, metadata !22), !dbg !23
44-
call void @h(i32* nonnull %x.addr) #4, !dbg !34
43+
tail call void @llvm.dbg.value(metadata ptr %x.addr, i64 0, metadata !19, metadata !22), !dbg !23
44+
call void @h(ptr nonnull %x.addr) #4, !dbg !34
4545
br label %if.end, !dbg !34
4646

4747
if.end: ; preds = %if.then, %entry
@@ -50,9 +50,9 @@
5050

5151
declare void @llvm.dbg.declare(metadata, metadata, metadata) #1
5252
declare void @g([4 x double]) local_unnamed_addr #2
53-
declare void @h(i32*) local_unnamed_addr #2
53+
declare void @h(ptr) local_unnamed_addr #2
5454
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1
55-
declare void @llvm.stackprotector(i8*, i8**) #3
55+
declare void @llvm.stackprotector(ptr, ptr) #3
5656

5757
attributes #0 = { nounwind optsize ssp }
5858
attributes #1 = { nounwind readnone speculatable }

‎llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-expr-chain.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@
2020

2121
define dso_local i64 @foo() local_unnamed_addr !dbg !12 {
2222
entry:
23-
%0 = load i64, i64* @global, align 8, !dbg !17
23+
%0 = load i64, ptr @global, align 8, !dbg !17
2424
call void @llvm.dbg.value(metadata i64 %0, metadata !16, metadata !DIExpression()), !dbg !17
2525
%add = add nsw i64 %0, 123, !dbg !17
2626
%sub = add nsw i64 %0, -456, !dbg !17

‎llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param-with-offset.mir

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -16,14 +16,14 @@
1616
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
1717
target triple = "arm64-apple-ios10.0.0"
1818

19-
%struct.fat_ptr = type { i32*, i32*, i32* }
19+
%struct.fat_ptr = type { ptr, ptr, ptr }
2020

21-
define i32 @bar(%struct.fat_ptr* nocapture readonly %f) local_unnamed_addr !dbg !13 {
21+
define i32 @bar(ptr nocapture readonly %f) local_unnamed_addr !dbg !13 {
2222
entry:
23-
call void @llvm.dbg.declare(metadata %struct.fat_ptr* %f, metadata !23, metadata !DIExpression()), !dbg !24
24-
%ptr2 = bitcast %struct.fat_ptr* %f to i32**, !dbg !25
25-
%0 = load i32*, i32** %ptr2, align 8, !dbg !25
26-
%1 = load i32, i32* %0, align 4, !dbg !31
23+
call void @llvm.dbg.declare(metadata ptr %f, metadata !23, metadata !DIExpression()), !dbg !24
24+
%ptr2 = bitcast ptr %f to ptr, !dbg !25
25+
%0 = load ptr, ptr %ptr2, align 8, !dbg !25
26+
%1 = load i32, ptr %0, align 4, !dbg !31
2727
%call = tail call i32 @baz(i32 %1), !dbg !34
2828
%call1 = tail call i32 @baz(i32 %call), !dbg !35
2929
ret i32 %call1, !dbg !36

‎llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-indirect-param.mir

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -35,14 +35,14 @@
3535
target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
3636
target triple = "arm64-apple-ios10.0.0"
3737

38-
%struct.fat_ptr = type { i32*, i32*, i32* }
38+
%struct.fat_ptr = type { ptr, ptr, ptr }
3939

40-
define i32 @bar(%struct.fat_ptr* nocapture readonly %f) local_unnamed_addr !dbg !13 {
40+
define i32 @bar(ptr nocapture readonly %f) local_unnamed_addr !dbg !13 {
4141
entry:
42-
call void @llvm.dbg.declare(metadata %struct.fat_ptr* %f, metadata !23, metadata !DIExpression()), !dbg !24
43-
%ptr2 = bitcast %struct.fat_ptr* %f to i32**, !dbg !25
44-
%0 = load i32*, i32** %ptr2, align 8, !dbg !25
45-
%1 = load i32, i32* %0, align 4, !dbg !31
42+
call void @llvm.dbg.declare(metadata ptr %f, metadata !23, metadata !DIExpression()), !dbg !24
43+
%ptr2 = bitcast ptr %f to ptr, !dbg !25
44+
%0 = load ptr, ptr %ptr2, align 8, !dbg !25
45+
%1 = load i32, ptr %0, align 4, !dbg !31
4646
%call = tail call i32 @baz(i32 %1), !dbg !34
4747
%call1 = tail call i32 @baz(i32 %call), !dbg !35
4848
ret i32 %call1, !dbg !36

‎llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-interpretation.mir

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -47,42 +47,42 @@
4747
call void @llvm.dbg.value(metadata i32 %arg1, metadata !17, metadata !DIExpression()), !dbg !21
4848
call void @llvm.dbg.value(metadata i32 %arg2, metadata !18, metadata !DIExpression()), !dbg !21
4949
call void @llvm.dbg.value(metadata i32 %arg3, metadata !19, metadata !DIExpression()), !dbg !21
50-
store i32 %arg3, i32* %arg3.addr, align 4
51-
%0 = bitcast i32* %a to i8*, !dbg !21
52-
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0), !dbg !21
50+
store i32 %arg3, ptr %arg3.addr, align 4
51+
%0 = bitcast ptr %a to ptr, !dbg !21
52+
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %0), !dbg !21
5353
%add = add nsw i32 %arg1, 2, !dbg !21
5454
%sub = add nsw i32 %arg2, -4, !dbg !21
55-
call void @llvm.dbg.value(metadata i32* %arg3.addr, metadata !19, metadata !DIExpression(DW_OP_deref)), !dbg !21
56-
%call = call i32 @func2(i32 %add, i32 %sub, i32* nonnull %arg3.addr), !dbg !21
55+
call void @llvm.dbg.value(metadata ptr %arg3.addr, metadata !19, metadata !DIExpression(DW_OP_deref)), !dbg !21
56+
%call = call i32 @func2(i32 %add, i32 %sub, ptr nonnull %arg3.addr), !dbg !21
5757
call void @llvm.dbg.value(metadata i32 %call, metadata !20, metadata !DIExpression()), !dbg !21
58-
store i32 %call, i32* %a, align 4, !dbg !21
59-
%1 = load i32, i32* %arg3.addr, align 4, !dbg !21
58+
store i32 %call, ptr %a, align 4, !dbg !21
59+
%1 = load i32, ptr %arg3.addr, align 4, !dbg !21
6060
call void @llvm.dbg.value(metadata i32 %1, metadata !19, metadata !DIExpression()), !dbg !21
6161
%sub1 = add nsw i32 %1, -16, !dbg !21
6262
%add2 = add nsw i32 %arg1, 8, !dbg !21
63-
call void @llvm.dbg.value(metadata i32* %a, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !21
64-
%call3 = call i32 @func2(i32 %sub1, i32 %add2, i32* nonnull %a), !dbg !21
65-
%2 = load i32, i32* %a, align 4, !dbg !21
63+
call void @llvm.dbg.value(metadata ptr %a, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !21
64+
%call3 = call i32 @func2(i32 %sub1, i32 %add2, ptr nonnull %a), !dbg !21
65+
%2 = load i32, ptr %a, align 4, !dbg !21
6666
call void @llvm.dbg.value(metadata i32 %2, metadata !20, metadata !DIExpression()), !dbg !21
6767
%add4 = add nsw i32 %2, %call3, !dbg !21
6868
call void @llvm.dbg.value(metadata i32 %add4, metadata !20, metadata !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value)), !dbg !21
69-
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0), !dbg !21
69+
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %0), !dbg !21
7070
ret i32 %add4, !dbg !21
7171
}
7272

7373
; Function Attrs: argmemonly nounwind willreturn
74-
declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
74+
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
7575

76-
declare !dbg !4 dso_local i32 @func2(i32, i32, i32*) local_unnamed_addr
76+
declare !dbg !4 dso_local i32 @func2(i32, i32, ptr) local_unnamed_addr
7777

7878
; Function Attrs: argmemonly nounwind willreturn
79-
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
79+
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
8080

8181
; Function Attrs: nounwind readnone speculatable willreturn
8282
declare void @llvm.dbg.value(metadata, metadata, metadata)
8383

8484
; Function Attrs: nounwind
85-
declare void @llvm.stackprotector(i8*, i8**)
85+
declare void @llvm.stackprotector(ptr, ptr)
8686

8787
attributes #0 = { "frame-pointer"="all" }
8888

‎llvm/test/DebugInfo/MIR/AArch64/dbgcall-site-orr-moves.mir

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -55,7 +55,7 @@
5555
call void @llvm.dbg.value(metadata i32 %p, metadata !40, metadata !DIExpression()), !dbg !42
5656
call void @llvm.dbg.value(metadata i64 %q, metadata !41, metadata !DIExpression()), !dbg !42
5757
%conv = trunc i64 %q to i32, !dbg !43
58-
%0 = load i32, i32* @global, align 4, !dbg !43
58+
%0 = load i32, ptr @global, align 4, !dbg !43
5959
tail call void @call_int_int(i32 %conv, i32 %0), !dbg !43
6060
ret i32 %p, !dbg !44
6161
}

‎llvm/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -21,64 +21,64 @@
2121

2222
@bt = global i32 0, align 4
2323

24-
define void @_ZN1v2bvEv(%class.v* nocapture readonly %this) local_unnamed_addr align 2 !dbg !14 {
24+
define void @_ZN1v2bvEv(ptr nocapture readonly %this) local_unnamed_addr align 2 !dbg !14 {
2525
entry:
2626
%bz = alloca %class.j, align 8
2727
%att = alloca %class.j, align 8
28-
%ap = getelementptr inbounds %class.v, %class.v* %this, i64 0, i32 1
29-
%0 = load i8, i8* %ap, align 4
28+
%ap = getelementptr inbounds %class.v, ptr %this, i64 0, i32 1
29+
%0 = load i8, ptr %ap, align 4
3030
%conv = sext i8 %0 to i32
3131
switch i32 %conv, label %sw.epilog [
3232
i32 1, label %_ZN1jILi6EN1a1fEE1mEj.exit
3333
i32 0, label %sw.bb2
3434
]
3535

3636
_ZN1jILi6EN1a1fEE1mEj.exit: ; preds = %entry
37-
%1 = bitcast %class.j* %att to i64*
38-
%2 = bitcast %class.j* %bz to i64*
39-
store i64 1, i64* %2, align 8
37+
%1 = bitcast ptr %att to ptr
38+
%2 = bitcast ptr %bz to ptr
39+
store i64 1, ptr %2, align 8
4040
call void @llvm.dbg.value(metadata i32 0, i64 0, metadata !18, metadata !23), !dbg !24
41-
store i64 1, i64* %1, align 8, !dbg !27
41+
store i64 1, ptr %1, align 8, !dbg !27
4242
br label %sw.epilog
4343

4444
sw.bb2: ; preds = %entry
45-
%3 = bitcast %class.j* %att to i64*
46-
%4 = bitcast %class.j* %bz to i64*
47-
%.pre = load i64, i64* %3, align 8
48-
%agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i13.phi.trans.insert = getelementptr inbounds %class.j, %class.j* %bz, i64 0, i32 1
49-
%.phi.trans.insert = bitcast i32* %agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i13.phi.trans.insert to i64*
50-
%agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i14.pre = load i64, i64* %.phi.trans.insert, align 8
51-
%.pre25 = load i64, i64* %4, align 8
52-
%agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i.phi.trans.insert = getelementptr inbounds %class.j, %class.j* %att, i64 0, i32 1
53-
%.phi.trans.insert26 = bitcast i32* %agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i.phi.trans.insert to i64*
54-
%agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i.pre = load i64, i64* %.phi.trans.insert26, align 8
45+
%3 = bitcast ptr %att to ptr
46+
%4 = bitcast ptr %bz to ptr
47+
%.pre = load i64, ptr %3, align 8
48+
%agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i13.phi.trans.insert = getelementptr inbounds %class.j, ptr %bz, i64 0, i32 1
49+
%.phi.trans.insert = bitcast ptr %agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i13.phi.trans.insert to ptr
50+
%agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i14.pre = load i64, ptr %.phi.trans.insert, align 8
51+
%.pre25 = load i64, ptr %4, align 8
52+
%agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i.phi.trans.insert = getelementptr inbounds %class.j, ptr %att, i64 0, i32 1
53+
%.phi.trans.insert26 = bitcast ptr %agg.tmp.sroa.2.0..sroa_idx1.i.i.i.i.i.i.phi.trans.insert to ptr
54+
%agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i.pre = load i64, ptr %.phi.trans.insert26, align 8
5555
br label %sw.epilog
5656

5757
sw.epilog: ; preds = %sw.bb2, %_ZN1jILi6EN1a1fEE1mEj.exit, %entry
5858
%agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i = phi i64 [ %agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i.pre, %sw.bb2 ], [ undef, %entry ], [ undef, %_ZN1jILi6EN1a1fEE1mEj.exit ], !dbg !32
5959
%5 = phi i64 [ %.pre25, %sw.bb2 ], [ 0, %entry ], [ 1, %_ZN1jILi6EN1a1fEE1mEj.exit ]
6060
%agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i14 = phi i64 [ %agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i14.pre, %sw.bb2 ], [ undef, %entry ], [ undef, %_ZN1jILi6EN1a1fEE1mEj.exit ]
6161
%6 = phi i64 [ %.pre, %sw.bb2 ], [ 0, %entry ], [ 1, %_ZN1jILi6EN1a1fEE1mEj.exit ]
62-
%bw1 = bitcast %class.v* %this to i32*
63-
%7 = load i32, i32* %bw1, align 4
64-
%bx = getelementptr inbounds %class.v, %class.v* %this, i64 0, i32 2
65-
%8 = load i8, i8* %bx, align 1
62+
%bw1 = bitcast ptr %this to ptr
63+
%7 = load i32, ptr %bw1, align 4
64+
%bx = getelementptr inbounds %class.v, ptr %this, i64 0, i32 2
65+
%8 = load i8, ptr %bx, align 1
6666
%tobool = icmp ne i8 %8, 0
6767
%.fca.0.insert9 = insertvalue [2 x i64] undef, i64 %agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i14, 0
6868
%.fca.1.insert12 = insertvalue [2 x i64] %.fca.0.insert9, i64 %5, 1
6969
%.fca.0.insert = insertvalue [2 x i64] undef, i64 %agg.tmp.sroa.2.0.copyload2.i.i6.i.i.i.i, 0
7070
%.fca.1.insert = insertvalue [2 x i64] %.fca.0.insert, i64 %6, 1
71-
call void @_Z2byi1LS_bbPi(i32 %7, [2 x i64] %.fca.1.insert12, [2 x i64] %.fca.1.insert, i1 %tobool, i1 false, i32* nonnull @bt)
71+
call void @_Z2byi1LS_bbPi(i32 %7, [2 x i64] %.fca.1.insert12, [2 x i64] %.fca.1.insert, i1 %tobool, i1 false, ptr nonnull @bt)
7272
ret void
7373
}
7474

75-
declare void @_Z2byi1LS_bbPi(i32, [2 x i64], [2 x i64], i1, i1, i32*) local_unnamed_addr
75+
declare void @_Z2byi1LS_bbPi(i32, [2 x i64], [2 x i64], i1, i1, ptr) local_unnamed_addr
7676

7777
; Function Attrs: nounwind readnone speculatable
7878
declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #0
7979

8080
; Function Attrs: nounwind
81-
declare void @llvm.stackprotector(i8*, i8**) #1
81+
declare void @llvm.stackprotector(ptr, ptr) #1
8282

8383
attributes #0 = { nounwind readnone speculatable }
8484
attributes #1 = { nounwind }

‎llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovd.mir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -27,15 +27,15 @@
2727
define arm_aapcs_vfpcc i32 @b(double %c) local_unnamed_addr #0 !dbg !16 {
2828
entry:
2929
call void @llvm.dbg.value(metadata double %c, metadata !21, metadata !DIExpression()), !dbg !22
30-
%call = tail call arm_aapcs_vfpcc i32 bitcast (i32 (...)* @d to i32 ()*)(), !dbg !23
30+
%call = tail call arm_aapcs_vfpcc i32 @d(), !dbg !23
3131
%conv = fptrunc double %c to float, !dbg !24
3232
%call1 = tail call arm_aapcs_vfpcc i32 @a(float %conv), !dbg !25
3333
ret i32 undef, !dbg !26
3434
}
3535
declare arm_aapcs_vfpcc i32 @d(...) local_unnamed_addr #0
3636
declare !dbg !4 arm_aapcs_vfpcc i32 @a(float) local_unnamed_addr #0
3737
declare void @llvm.dbg.value(metadata, metadata, metadata)
38-
declare void @llvm.stackprotector(i8*, i8**)
38+
declare void @llvm.stackprotector(ptr, ptr)
3939

4040
attributes #0 = { "disable-tail-calls"="false" "frame-pointer"="all" "target-features"="+thumb-mode,+vfp2" }
4141

‎llvm/test/DebugInfo/MIR/ARM/call-site-info-vmovs.mir

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -22,14 +22,14 @@
2222
define arm_aapcs_vfpcc i32 @b(double %c) local_unnamed_addr #0 !dbg !16 {
2323
entry:
2424
call void @llvm.dbg.value(metadata double %c, metadata !18, metadata !DIExpression()), !dbg !19
25-
%call = tail call arm_aapcs_vfpcc i32 bitcast (i32 (...)* @d to i32 ()*)(), !dbg !20
25+
%call = tail call arm_aapcs_vfpcc i32 @d(), !dbg !20
2626
%call1 = tail call arm_aapcs_vfpcc i32 @a(double %c), !dbg !21
2727
ret i32 undef, !dbg !22
2828
}
2929
declare arm_aapcs_vfpcc i32 @d(...) local_unnamed_addr #0
3030
declare !dbg !4 arm_aapcs_vfpcc i32 @a(double) local_unnamed_addr #0
3131
declare void @llvm.dbg.value(metadata, metadata, metadata)
32-
declare void @llvm.stackprotector(i8*, i8**)
32+
declare void @llvm.stackprotector(ptr, ptr)
3333

3434
attributes #0 = { "disable-tail-calls"="false" "frame-pointer"="all" "target-features"="+thumb-mode,+vfp2" }
3535

‎llvm/test/DebugInfo/MIR/ARM/dbgcall-site-interpretation.mir

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -43,42 +43,42 @@
4343
call void @llvm.dbg.value(metadata i32 %arg1, metadata !18, metadata !DIExpression()), !dbg !22
4444
call void @llvm.dbg.value(metadata i32 %arg2, metadata !19, metadata !DIExpression()), !dbg !22
4545
call void @llvm.dbg.value(metadata i32 %arg3, metadata !20, metadata !DIExpression()), !dbg !22
46-
store i32 %arg3, i32* %arg3.addr, align 4
47-
%0 = bitcast i32* %a to i8*, !dbg !22
48-
call void @llvm.lifetime.start.p0i8(i64 4, i8* nonnull %0), !dbg !22
46+
store i32 %arg3, ptr %arg3.addr, align 4
47+
%0 = bitcast ptr %a to ptr, !dbg !22
48+
call void @llvm.lifetime.start.p0(i64 4, ptr nonnull %0), !dbg !22
4949
%add = add nsw i32 %arg1, 2, !dbg !22
5050
%sub = add nsw i32 %arg2, -4, !dbg !22
51-
call void @llvm.dbg.value(metadata i32* %arg3.addr, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !22
52-
%call = call arm_aapcscc i32 @func2(i32 %add, i32 %sub, i32* nonnull %arg3.addr), !dbg !22
51+
call void @llvm.dbg.value(metadata ptr %arg3.addr, metadata !20, metadata !DIExpression(DW_OP_deref)), !dbg !22
52+
%call = call arm_aapcscc i32 @func2(i32 %add, i32 %sub, ptr nonnull %arg3.addr), !dbg !22
5353
call void @llvm.dbg.value(metadata i32 %call, metadata !21, metadata !DIExpression()), !dbg !22
54-
store i32 %call, i32* %a, align 4, !dbg !22
55-
%1 = load i32, i32* %arg3.addr, align 4, !dbg !22
54+
store i32 %call, ptr %a, align 4, !dbg !22
55+
%1 = load i32, ptr %arg3.addr, align 4, !dbg !22
5656
call void @llvm.dbg.value(metadata i32 %1, metadata !20, metadata !DIExpression()), !dbg !22
5757
%sub1 = add nsw i32 %1, -16, !dbg !22
5858
%add2 = add nsw i32 %arg1, 8, !dbg !22
59-
call void @llvm.dbg.value(metadata i32* %a, metadata !21, metadata !DIExpression(DW_OP_deref)), !dbg !22
60-
%call3 = call arm_aapcscc i32 @func2(i32 %sub1, i32 %add2, i32* nonnull %a), !dbg !22
61-
%2 = load i32, i32* %a, align 4, !dbg !22
59+
call void @llvm.dbg.value(metadata ptr %a, metadata !21, metadata !DIExpression(DW_OP_deref)), !dbg !22
60+
%call3 = call arm_aapcscc i32 @func2(i32 %sub1, i32 %add2, ptr nonnull %a), !dbg !22
61+
%2 = load i32, ptr %a, align 4, !dbg !22
6262
call void @llvm.dbg.value(metadata i32 %2, metadata !21, metadata !DIExpression()), !dbg !22
6363
%add4 = add nsw i32 %2, %call3, !dbg !22
6464
call void @llvm.dbg.value(metadata i32 %add4, metadata !21, metadata !DIExpression(DW_OP_plus_uconst, 1, DW_OP_stack_value)), !dbg !22
65-
call void @llvm.lifetime.end.p0i8(i64 4, i8* nonnull %0), !dbg !22
65+
call void @llvm.lifetime.end.p0(i64 4, ptr nonnull %0), !dbg !22
6666
ret i32 %add4, !dbg !22
6767
}
6868

6969
; Function Attrs: argmemonly nounwind willreturn
70-
declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture)
70+
declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture)
7171

72-
declare !dbg !4 dso_local arm_aapcscc i32 @func2(i32, i32, i32*) local_unnamed_addr
72+
declare !dbg !4 dso_local arm_aapcscc i32 @func2(i32, i32, ptr) local_unnamed_addr
7373

7474
; Function Attrs: argmemonly nounwind willreturn
75-
declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture)
75+
declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture)
7676

7777
; Function Attrs: nounwind readnone speculatable willreturn
7878
declare void @llvm.dbg.value(metadata, metadata, metadata)
7979

8080
; Function Attrs: nounwind
81-
declare void @llvm.stackprotector(i8*, i8**)
81+
declare void @llvm.stackprotector(ptr, ptr)
8282

8383
attributes #0 = { "frame-pointer"="all" "target-features"="+armv7-a" }
8484

‎llvm/test/DebugInfo/MIR/ARM/dbgcall-site-propagated-value.mir

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -33,14 +33,14 @@
3333
}
3434

3535
; Function Attrs: noinline nounwind optsize
36-
define internal arm_aapcs_vfpcc void @callee(i32* %p1) unnamed_addr #0 !dbg !29 {
36+
define internal arm_aapcs_vfpcc void @callee(ptr %p1) unnamed_addr #0 !dbg !29 {
3737
entry:
3838
unreachable
3939
}
4040

41-
declare !dbg !4 arm_aapcs_vfpcc i32* @value()
42-
declare !dbg !9 arm_aapcs_vfpcc i32 @interesting(i32*)
43-
declare !dbg !12 arm_aapcs_vfpcc void @ext(i32*)
41+
declare !dbg !4 arm_aapcs_vfpcc ptr @value()
42+
declare !dbg !9 arm_aapcs_vfpcc i32 @interesting(ptr)
43+
declare !dbg !12 arm_aapcs_vfpcc void @ext(ptr)
4444

4545
; Function Attrs: nounwind readnone speculatable willreturn
4646
declare void @llvm.dbg.value(metadata, metadata, metadata) #1

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