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1 | 1 | // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 5
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2 | 2 | // RUN: %clang_cc1 -finclude-default-header -triple \
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3 | 3 | // RUN: dxil-pc-shadermodel6.3-library %s -fnative-half-type \
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4 |
| -// RUN: -emit-llvm -O2 -o - | FileCheck %s |
| 4 | +// RUN: -emit-llvm -O1 -o - | FileCheck %s |
5 | 5 |
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6 | 6 | // CHECK-LABEL: define noundef half @_Z16test_length_halfDh(
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7 | 7 | // CHECK-SAME: half noundef [[P0:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
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@@ -128,24 +128,3 @@ float test_length_float4(float4 p0)
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128 | 128 | {
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129 | 129 | return length(p0);
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130 | 130 | }
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131 |
| - |
132 |
| - |
133 |
| -// CHECK-LABEL: define noundef float @_Z26test_length_float4_extractDv4_f( |
134 |
| -// CHECK-SAME: <4 x float> noundef [[P0:%.*]]) local_unnamed_addr #[[ATTR0]] { |
135 |
| -// CHECK-NEXT: [[ENTRY:.*:]] |
136 |
| -// CHECK-NEXT: [[MUL_I:%.*]] = fmul <4 x float> [[P0]], [[P0]] |
137 |
| -// CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <4 x float> [[MUL_I]], i64 0 |
138 |
| -// CHECK-NEXT: [[VECEXT1_I:%.*]] = extractelement <4 x float> [[MUL_I]], i64 1 |
139 |
| -// CHECK-NEXT: [[VECEXT1_I_1:%.*]] = extractelement <4 x float> [[MUL_I]], i64 2 |
140 |
| -// CHECK-NEXT: [[VECEXT1_I_2:%.*]] = extractelement <4 x float> [[MUL_I]], i64 3 |
141 |
| -// CHECK-NEXT: [[ADD_I12:%.*]] = fadd float [[VECEXT_I]], [[VECEXT1_I]] |
142 |
| -// CHECK-NEXT: [[ADD_I12_1:%.*]] = fadd float [[ADD_I12]], [[VECEXT1_I_1]] |
143 |
| -// CHECK-NEXT: [[ADD_I12_2:%.*]] = fadd float [[ADD_I12_1]], [[VECEXT1_I_2]] |
144 |
| -// CHECK-NEXT: [[TMP0:%.*]] = tail call noundef float @llvm.sqrt.f32(float [[ADD_I12_2]]) |
145 |
| -// CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP0]], [[TMP0]] |
146 |
| -// CHECK-NEXT: ret float [[ADD]] |
147 |
| -// |
148 |
| -float test_length_float4_extract(float4 p0) |
149 |
| -{ |
150 |
| - return length(p0) + length(p0); |
151 |
| -} |
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