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[Clang] Run update_cc_test_checks across SVE acle tests.
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‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i32.c

Lines changed: 123 additions & 56 deletions
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‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_add-i64.c

Lines changed: 123 additions & 56 deletions
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‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_cnt.c

Lines changed: 47 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -1,46 +1,73 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3
12
// REQUIRES: aarch64-registered-target
23
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C
34
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX
45
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s
56

67
#include <arm_sme_draft_spec_subject_to_change.h>
78

8-
// CHECK-C-LABEL: @test_svcntsb(
9-
// CHECK-CXX-LABEL: @_Z12test_svcntsbv(
10-
// CHECK-NEXT: entry:
11-
// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
12-
// CHECK-NEXT: ret i64 [[TMP0]]
9+
// CHECK-C-LABEL: define dso_local i64 @test_svcntsb(
10+
// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] {
11+
// CHECK-C-NEXT: entry:
12+
// CHECK-C-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
13+
// CHECK-C-NEXT: ret i64 [[TMP0]]
14+
//
15+
// CHECK-CXX-LABEL: define dso_local noundef i64 @_Z12test_svcntsbv(
16+
// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0:[0-9]+]] {
17+
// CHECK-CXX-NEXT: entry:
18+
// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
19+
// CHECK-CXX-NEXT: ret i64 [[TMP0]]
1320
//
1421
uint64_t test_svcntsb() {
1522
return svcntsb();
1623
}
1724

18-
// CHECK-C-LABEL: @test_svcntsh(
19-
// CHECK-CXX-LABEL: @_Z12test_svcntshv(
20-
// CHECK-NEXT: entry:
21-
// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsh()
22-
// CHECK-NEXT: ret i64 [[TMP0]]
25+
// CHECK-C-LABEL: define dso_local i64 @test_svcntsh(
26+
// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0]] {
27+
// CHECK-C-NEXT: entry:
28+
// CHECK-C-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsh()
29+
// CHECK-C-NEXT: ret i64 [[TMP0]]
30+
//
31+
// CHECK-CXX-LABEL: define dso_local noundef i64 @_Z12test_svcntshv(
32+
// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0]] {
33+
// CHECK-CXX-NEXT: entry:
34+
// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsh()
35+
// CHECK-CXX-NEXT: ret i64 [[TMP0]]
2336
//
2437
uint64_t test_svcntsh() {
2538
return svcntsh();
2639
}
2740

28-
// CHECK-C-LABEL: @test_svcntsw(
29-
// CHECK-CXX-LABEL: @_Z12test_svcntswv(
30-
// CHECK-NEXT: entry:
31-
// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsw()
32-
// CHECK-NEXT: ret i64 [[TMP0]]
41+
// CHECK-C-LABEL: define dso_local i64 @test_svcntsw(
42+
// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0]] {
43+
// CHECK-C-NEXT: entry:
44+
// CHECK-C-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsw()
45+
// CHECK-C-NEXT: ret i64 [[TMP0]]
46+
//
47+
// CHECK-CXX-LABEL: define dso_local noundef i64 @_Z12test_svcntswv(
48+
// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0]] {
49+
// CHECK-CXX-NEXT: entry:
50+
// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsw()
51+
// CHECK-CXX-NEXT: ret i64 [[TMP0]]
3352
//
3453
uint64_t test_svcntsw() {
3554
return svcntsw();
3655
}
3756

38-
// CHECK-C-LABEL: @test_svcntsd(
39-
// CHECK-CXX-LABEL: @_Z12test_svcntsdv(
40-
// CHECK-NEXT: entry:
41-
// CHECK-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsd()
42-
// CHECK-NEXT: ret i64 [[TMP0]]
57+
// CHECK-C-LABEL: define dso_local i64 @test_svcntsd(
58+
// CHECK-C-SAME: ) local_unnamed_addr #[[ATTR0]] {
59+
// CHECK-C-NEXT: entry:
60+
// CHECK-C-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsd()
61+
// CHECK-C-NEXT: ret i64 [[TMP0]]
62+
//
63+
// CHECK-CXX-LABEL: define dso_local noundef i64 @_Z12test_svcntsdv(
64+
// CHECK-CXX-SAME: ) local_unnamed_addr #[[ATTR0]] {
65+
// CHECK-CXX-NEXT: entry:
66+
// CHECK-CXX-NEXT: [[TMP0:%.*]] = tail call i64 @llvm.aarch64.sme.cntsd()
67+
// CHECK-CXX-NEXT: ret i64 [[TMP0]]
4368
//
4469
uint64_t test_svcntsd() {
4570
return svcntsd();
4671
}
72+
//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
73+
// CHECK: {{.*}}

‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1.c

Lines changed: 165 additions & 76 deletions
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‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ld1_vnum.c

Lines changed: 225 additions & 106 deletions
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‎clang/test/CodeGen/aarch64-sme-intrinsics/acle_sme_ldr.c

Lines changed: 65 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -1,55 +1,91 @@
1+
// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 3
12
// REQUIRES: aarch64-registered-target
23
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - %s | FileCheck %s -check-prefixes=CHECK,CHECK-C
34
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -emit-llvm -o - -x c++ %s | FileCheck %s -check-prefixes=CHECK,CHECK-CXX
45
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme -target-feature +sve -S -O1 -Werror -o /dev/null %s
56

67
#include <arm_sme_draft_spec_subject_to_change.h>
78

8-
// CHECK-C-LABEL: @test_svldr_vnum_za(
9-
// CHECK-CXX-LABEL: @_Z18test_svldr_vnum_zajPKv(
10-
// CHECK-NEXT: entry:
11-
// CHECK-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]])
12-
// CHECK-NEXT: ret void
9+
// CHECK-C-LABEL: define dso_local void @test_svldr_vnum_za(
10+
// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
11+
// CHECK-C-NEXT: entry:
12+
// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE]], ptr [[PTR]])
13+
// CHECK-C-NEXT: ret void
14+
//
15+
// CHECK-CXX-LABEL: define dso_local void @_Z18test_svldr_vnum_zajPKv(
16+
// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
17+
// CHECK-CXX-NEXT: entry:
18+
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE]], ptr [[PTR]])
19+
// CHECK-CXX-NEXT: ret void
1320
//
1421
void test_svldr_vnum_za(uint32_t slice_base, const void *ptr) {
1522
svldr_vnum_za(slice_base, ptr, 0);
1623
}
1724

18-
// CHECK-C-LABEL: @test_svldr_vnum_za_1(
19-
// CHECK-CXX-LABEL: @_Z20test_svldr_vnum_za_1jPKv(
20-
// CHECK-NEXT: entry:
21-
// CHECK-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
22-
// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], 15
23-
// CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]]
24-
// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE:%.*]], 15
25-
// CHECK-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[TILESLICE]], ptr [[TMP0]])
26-
// CHECK-NEXT: ret void
25+
// CHECK-C-LABEL: define dso_local void @test_svldr_vnum_za_1(
26+
// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] {
27+
// CHECK-C-NEXT: entry:
28+
// CHECK-C-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
29+
// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], 15
30+
// CHECK-C-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]]
31+
// CHECK-C-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE]], 15
32+
// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[TILESLICE]], ptr [[TMP0]])
33+
// CHECK-C-NEXT: ret void
34+
//
35+
// CHECK-CXX-LABEL: define dso_local void @_Z20test_svldr_vnum_za_1jPKv(
36+
// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] {
37+
// CHECK-CXX-NEXT: entry:
38+
// CHECK-CXX-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
39+
// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], 15
40+
// CHECK-CXX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]]
41+
// CHECK-CXX-NEXT: [[TILESLICE:%.*]] = add i32 [[SLICE_BASE]], 15
42+
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[TILESLICE]], ptr [[TMP0]])
43+
// CHECK-CXX-NEXT: ret void
2744
//
2845
void test_svldr_vnum_za_1(uint32_t slice_base, const void *ptr) {
2946
svldr_vnum_za(slice_base, ptr, 15);
3047
}
3148

32-
// CHECK-C-LABEL: @test_svldr_za(
33-
// CHECK-CXX-LABEL: @_Z13test_svldr_zajPKv(
34-
// CHECK-NEXT: entry:
35-
// CHECK-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE:%.*]], ptr [[PTR:%.*]])
36-
// CHECK-NEXT: ret void
49+
// CHECK-C-LABEL: define dso_local void @test_svldr_za(
50+
// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] {
51+
// CHECK-C-NEXT: entry:
52+
// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE]], ptr [[PTR]])
53+
// CHECK-C-NEXT: ret void
54+
//
55+
// CHECK-CXX-LABEL: define dso_local void @_Z13test_svldr_zajPKv(
56+
// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]]) local_unnamed_addr #[[ATTR0]] {
57+
// CHECK-CXX-NEXT: entry:
58+
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[SLICE_BASE]], ptr [[PTR]])
59+
// CHECK-CXX-NEXT: ret void
3760
//
3861
void test_svldr_za(uint32_t slice_base, const void *ptr) {
3962
svldr_za(slice_base, ptr);
4063
}
4164

42-
// CHECK-C-LABEL: @test_svldr_vnum_za_var(
43-
// CHECK-CXX-LABEL: @_Z22test_svldr_vnum_za_varjPKvl(
44-
// CHECK-NEXT: entry:
45-
// CHECK-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
46-
// CHECK-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], [[VNUM:%.*]]
47-
// CHECK-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR:%.*]], i64 [[MULVL]]
48-
// CHECK-NEXT: [[TMP1:%.*]] = trunc i64 [[VNUM:%.*]] to i32
49-
// CHECK-NEXT: [[TILESLICE:%.*]] = add i32 [[TMP1]], [[SLICE_BASE:%.*]]
50-
// CHECK-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[TILESLICE]], ptr [[TMP0]])
51-
// CHECK-NEXT: ret void
65+
// CHECK-C-LABEL: define dso_local void @test_svldr_vnum_za_var(
66+
// CHECK-C-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] {
67+
// CHECK-C-NEXT: entry:
68+
// CHECK-C-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
69+
// CHECK-C-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], [[VNUM]]
70+
// CHECK-C-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]]
71+
// CHECK-C-NEXT: [[TMP1:%.*]] = trunc i64 [[VNUM]] to i32
72+
// CHECK-C-NEXT: [[TILESLICE:%.*]] = add i32 [[TMP1]], [[SLICE_BASE]]
73+
// CHECK-C-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[TILESLICE]], ptr [[TMP0]])
74+
// CHECK-C-NEXT: ret void
75+
//
76+
// CHECK-CXX-LABEL: define dso_local void @_Z22test_svldr_vnum_za_varjPKvl(
77+
// CHECK-CXX-SAME: i32 noundef [[SLICE_BASE:%.*]], ptr noundef [[PTR:%.*]], i64 noundef [[VNUM:%.*]]) local_unnamed_addr #[[ATTR0]] {
78+
// CHECK-CXX-NEXT: entry:
79+
// CHECK-CXX-NEXT: [[SVLB:%.*]] = tail call i64 @llvm.aarch64.sme.cntsb()
80+
// CHECK-CXX-NEXT: [[MULVL:%.*]] = mul i64 [[SVLB]], [[VNUM]]
81+
// CHECK-CXX-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[PTR]], i64 [[MULVL]]
82+
// CHECK-CXX-NEXT: [[TMP1:%.*]] = trunc i64 [[VNUM]] to i32
83+
// CHECK-CXX-NEXT: [[TILESLICE:%.*]] = add i32 [[TMP1]], [[SLICE_BASE]]
84+
// CHECK-CXX-NEXT: tail call void @llvm.aarch64.sme.ldr(i32 [[TILESLICE]], ptr [[TMP0]])
85+
// CHECK-CXX-NEXT: ret void
5286
//
5387
void test_svldr_vnum_za_var(uint32_t slice_base, const void *ptr, int64_t vnum) {
5488
svldr_vnum_za(slice_base, ptr, vnum);
5589
}
90+
//// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
91+
// CHECK: {{.*}}

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