Skip to content

Commit 936d6ca

Browse files
committed
Address review comments
1 parent 81c0373 commit 936d6ca

File tree

1 file changed

+69
-67
lines changed

1 file changed

+69
-67
lines changed
Lines changed: 69 additions & 67 deletions
Original file line numberDiff line numberDiff line change
@@ -1,84 +1,86 @@
11
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2-
; RUN: opt -passes=loop-vectorize -S %s | FileCheck %s --check-prefix=CHECK-REV-MIN
2+
; RUN: opt -passes=loop-vectorize -force-vector-width=4 -S %s | FileCheck %s --check-prefix=CHECK-REV-MIN
33

44
; This test case is extracted from rnflow (fortran) benchmark in polyhedron benchmark suite.
55
; The function minlst primarily takes two indices (i.e. range), scans backwards in the range
66
; and returns the firstIV of the minimum value.
77

8-
define fastcc i32 @minlst(i32 %.0.val, i32 %.0.val1, ptr %.0.val3) {
9-
; CHECK-REV-MIN-LABEL: define internal fastcc i32 @_QFcptrf2Pminlst(
10-
; CHECK-REV-MIN-SAME: i32 [[DOT0_VAL:%.*]], i32 [[DOT0_VAL1:%.*]], ptr [[DOT0_VAL3:%.*]]) unnamed_addr {
11-
; CHECK-REV-MIN-NEXT: [[TMP1:%.*]] = sext i32 [[DOT0_VAL]] to i64
12-
; CHECK-REV-MIN-NEXT: [[TMP2:%.*]] = sub i32 0, [[DOT0_VAL1]]
13-
; CHECK-REV-MIN-NEXT: [[TMP3:%.*]] = sext i32 [[TMP2]] to i64
14-
; CHECK-REV-MIN-NEXT: [[TMP4:%.*]] = add nsw i64 [[TMP1]], [[TMP3]]
15-
; CHECK-REV-MIN-NEXT: [[TMP5:%.*]] = sub nsw i64 0, [[TMP4]]
16-
; CHECK-REV-MIN-NEXT: [[INVARIANT_GEP:%.*]] = getelementptr i8, ptr [[DOT0_VAL3]], i64 -8
17-
; CHECK-REV-MIN-NEXT: [[INVARIANT_GEP5:%.*]] = getelementptr i8, ptr [[DOT0_VAL3]], i64 -4
18-
; CHECK-REV-MIN-NEXT: [[TMP6:%.*]] = icmp slt i64 [[TMP4]], 0
19-
; CHECK-REV-MIN-NEXT: br i1 [[TMP6]], label %[[DOTLR_PH_PREHEADER:.*]], [[DOT_CRIT_EDGE:label %.*]]
20-
; CHECK-REV-MIN: [[_LR_PH_PREHEADER:.*:]]
21-
; CHECK-REV-MIN-NEXT: [[TMP7:%.*]] = sext i32 [[DOT0_VAL1]] to i64
22-
; CHECK-REV-MIN-NEXT: br label %[[DOTLR_PH:.*]]
23-
; CHECK-REV-MIN: [[_LR_PH:.*:]]
24-
; CHECK-REV-MIN-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[TMP7]], %[[DOTLR_PH_PREHEADER]] ], [ [[INDVARS_IV_NEXT:%.*]], %[[DOTLR_PH]] ]
25-
; CHECK-REV-MIN-NEXT: [[TMP8:%.*]] = phi i64 [ [[TMP14:%.*]], %[[DOTLR_PH]] ], [ [[TMP5]], %[[DOTLR_PH_PREHEADER]] ]
26-
; CHECK-REV-MIN-NEXT: [[DOT07:%.*]] = phi i32 [ [[DOT1:%.*]], %[[DOTLR_PH]] ], [ [[DOT0_VAL1]], %[[DOTLR_PH_PREHEADER]] ]
27-
; CHECK-REV-MIN-NEXT: [[INDVARS_IV_NEXT]] = add nsw i64 [[INDVARS_IV]], -1
28-
; CHECK-REV-MIN-NEXT: [[GEP:%.*]] = getelementptr float, ptr [[INVARIANT_GEP]], i64 [[INDVARS_IV]]
29-
; CHECK-REV-MIN-NEXT: [[TMP9:%.*]] = load float, ptr [[GEP]], align 4
30-
; CHECK-REV-MIN-NEXT: [[TMP10:%.*]] = sext i32 [[DOT07]] to i64
31-
; CHECK-REV-MIN-NEXT: [[GEP6:%.*]] = getelementptr float, ptr [[INVARIANT_GEP5]], i64 [[TMP10]]
32-
; CHECK-REV-MIN-NEXT: [[TMP11:%.*]] = load float, ptr [[GEP6]], align 4
33-
; CHECK-REV-MIN-NEXT: [[TMP12:%.*]] = fcmp contract olt float [[TMP9]], [[TMP11]]
34-
; CHECK-REV-MIN-NEXT: [[TMP13:%.*]] = trunc nsw i64 [[INDVARS_IV_NEXT]] to i32
35-
; CHECK-REV-MIN-NEXT: [[DOT1]] = select i1 [[TMP12]], i32 [[TMP13]], i32 [[DOT07]]
36-
; CHECK-REV-MIN-NEXT: [[TMP14]] = add nsw i64 [[TMP8]], -1
37-
; CHECK-REV-MIN-NEXT: [[TMP15:%.*]] = icmp sgt i64 [[TMP8]], 1
38-
; CHECK-REV-MIN-NEXT: br i1 [[TMP15]], label %[[DOTLR_PH]], label %[[DOT_CRIT_EDGE_LOOPEXIT:.*]]
8+
define fastcc i32 @minlst(i32 %first_index, i32 %last_index, ptr %array) {
9+
; CHECK-REV-MIN-LABEL: define fastcc i32 @minlst(
10+
; CHECK-REV-MIN-SAME: i32 [[FIRST_INDEX:%.*]], i32 [[LAST_INDEX:%.*]], ptr [[ARRAY:%.*]]) {
11+
; CHECK-REV-MIN-NEXT: [[ENTRY:.*]]:
12+
; CHECK-REV-MIN-NEXT: [[FIRST_INDEX_SEXT:%.*]] = sext i32 [[FIRST_INDEX]] to i64
13+
; CHECK-REV-MIN-NEXT: [[LAST_INDEX_NEG:%.*]] = sub i32 0, [[LAST_INDEX]]
14+
; CHECK-REV-MIN-NEXT: [[LAST_INDEX_NEG_SEXT:%.*]] = sext i32 [[LAST_INDEX_NEG]] to i64
15+
; CHECK-REV-MIN-NEXT: [[ADD:%.*]] = add nsw i64 [[FIRST_INDEX_SEXT]], [[LAST_INDEX_NEG_SEXT]]
16+
; CHECK-REV-MIN-NEXT: [[SUB:%.*]] = sub nsw i64 0, [[ADD]]
17+
; CHECK-REV-MIN-NEXT: [[INVARIANT_GEP:%.*]] = getelementptr i8, ptr [[ARRAY]], i64 -8
18+
; CHECK-REV-MIN-NEXT: [[INVARIANT_GEP5:%.*]] = getelementptr i8, ptr [[ARRAY]], i64 -4
19+
; CHECK-REV-MIN-NEXT: [[EARLY_EXIT_COND:%.*]] = icmp slt i64 [[ADD]], 0
20+
; CHECK-REV-MIN-NEXT: br i1 [[EARLY_EXIT_COND]], label %[[LOOP_PREHEADER:.*]], [[DOT_CRIT_EDGE:label %.*]]
21+
; CHECK-REV-MIN: [[LOOP_PREHEADER]]:
22+
; CHECK-REV-MIN-NEXT: [[LAST_INDEX_SEXT:%.*]] = sext i32 [[LAST_INDEX]] to i64
23+
; CHECK-REV-MIN-NEXT: br label %[[LOOP:.*]]
24+
; CHECK-REV-MIN: [[LOOP]]:
25+
; CHECK-REV-MIN-NEXT: [[IV:%.*]] = phi i64 [ [[LAST_INDEX_SEXT]], %[[LOOP_PREHEADER]] ], [ [[IV_NEXT:%.*]], %[[LOOP]] ]
26+
; CHECK-REV-MIN-NEXT: [[TMP0:%.*]] = phi i64 [ [[TMP1:%.*]], %[[LOOP]] ], [ [[SUB]], %[[LOOP_PREHEADER]] ]
27+
; CHECK-REV-MIN-NEXT: [[INDEX:%.*]] = phi i32 [ [[SELECT:%.*]], %[[LOOP]] ], [ [[LAST_INDEX]], %[[LOOP_PREHEADER]] ]
28+
; CHECK-REV-MIN-NEXT: [[IV_NEXT]] = add nsw i64 [[IV]], -1
29+
; CHECK-REV-MIN-NEXT: [[GEP:%.*]] = getelementptr float, ptr [[INVARIANT_GEP]], i64 [[IV]]
30+
; CHECK-REV-MIN-NEXT: [[LOAD1:%.*]] = load float, ptr [[GEP]], align 4
31+
; CHECK-REV-MIN-NEXT: [[INDEX_SEXT:%.*]] = sext i32 [[INDEX]] to i64
32+
; CHECK-REV-MIN-NEXT: [[GEP6:%.*]] = getelementptr float, ptr [[INVARIANT_GEP5]], i64 [[INDEX_SEXT]]
33+
; CHECK-REV-MIN-NEXT: [[LOAD2:%.*]] = load float, ptr [[GEP6]], align 4
34+
; CHECK-REV-MIN-NEXT: [[CMP:%.*]] = fcmp contract olt float [[LOAD1]], [[LOAD2]]
35+
; CHECK-REV-MIN-NEXT: [[IV_NEXT_TRUNC:%.*]] = trunc nsw i64 [[IV_NEXT]] to i32
36+
; CHECK-REV-MIN-NEXT: [[SELECT]] = select i1 [[CMP]], i32 [[IV_NEXT_TRUNC]], i32 [[INDEX]]
37+
; CHECK-REV-MIN-NEXT: [[TMP1]] = add nsw i64 [[TMP0]], -1
38+
; CHECK-REV-MIN-NEXT: [[LOOP_COND:%.*]] = icmp sgt i64 [[TMP0]], 1
39+
; CHECK-REV-MIN-NEXT: br i1 [[LOOP_COND]], label %[[LOOP]], label %[[DOT_CRIT_EDGE_LOOPEXIT:.*]]
3940
; CHECK-REV-MIN: [[__CRIT_EDGE_LOOPEXIT:.*:]]
40-
; CHECK-REV-MIN-NEXT: [[DOT1_LCSSA:%.*]] = phi i32 [ [[DOT1]], %[[DOTLR_PH]] ]
41+
; CHECK-REV-MIN-NEXT: [[SELECT_LCSSA:%.*]] = phi i32 [ [[SELECT]], %[[LOOP]] ]
4142
; CHECK-REV-MIN-NEXT: br [[DOT_CRIT_EDGE]]
4243
; CHECK-REV-MIN: [[__CRIT_EDGE:.*:]]
43-
; CHECK-REV-MIN-NEXT: [[DOT0_LCSSA:%.*]] = phi i32 [ [[DOT0_VAL1]], [[TMP0:%.*]] ], [ [[DOT1_LCSSA]], %[[DOT_CRIT_EDGE_LOOPEXIT]] ]
44-
; CHECK-REV-MIN-NEXT: ret i32 [[DOT0_LCSSA]]
44+
; CHECK-REV-MIN-NEXT: [[LAST_INDEX_RET:%.*]] = phi i32 [ [[LAST_INDEX]], %[[ENTRY]] ], [ [[SELECT_LCSSA]], %[[DOT_CRIT_EDGE_LOOPEXIT]] ]
45+
; CHECK-REV-MIN-NEXT: ret i32 [[LAST_INDEX_RET]]
4546
;
46-
%1 = sext i32 %.0.val to i64
47-
%2 = sub i32 0, %.0.val1
48-
%3 = sext i32 %2 to i64
49-
%4 = add nsw i64 %1, %3
50-
%5 = sub nsw i64 0, %4
51-
%invariant.gep = getelementptr i8, ptr %.0.val3, i64 -8
52-
%invariant.gep5 = getelementptr i8, ptr %.0.val3, i64 -4
53-
%6 = icmp slt i64 %4, 0
54-
br i1 %6, label %.lr.ph.preheader, label %._crit_edge
47+
entry:
48+
%first_index_sext = sext i32 %first_index to i64
49+
%last_index_neg = sub i32 0, %last_index
50+
%last_index_neg_sext = sext i32 %last_index_neg to i64
51+
%add = add nsw i64 %first_index_sext, %last_index_neg_sext
52+
%diff = sub nsw i64 0, %add
53+
%first_ptr = getelementptr i8, ptr %array, i64 -8
54+
%second_ptr = getelementptr i8, ptr %array, i64 -4
55+
%early_exit_cond = icmp slt i64 %add, 0
56+
br i1 %early_exit_cond, label %loop.preheader, label %._crit_edge
5557

56-
.lr.ph.preheader: ; preds = %0
57-
%7 = sext i32 %.0.val1 to i64
58-
br label %.lr.ph
58+
loop.preheader: ; preds = %entry
59+
%last_index_sext = sext i32 %last_index to i64
60+
br label %loop
5961

60-
.lr.ph: ; preds = %.lr.ph.preheader, %.lr.ph
61-
%indvars.iv = phi i64 [ %7, %.lr.ph.preheader ], [ %indvars.iv.next, %.lr.ph ]
62-
%8 = phi i64 [ %14, %.lr.ph ], [ %5, %.lr.ph.preheader ]
63-
%.07 = phi i32 [ %.1, %.lr.ph ], [ %.0.val1, %.lr.ph.preheader ]
64-
%indvars.iv.next = add nsw i64 %indvars.iv, -1
65-
%gep = getelementptr float, ptr %invariant.gep, i64 %indvars.iv
66-
%9 = load float, ptr %gep, align 4
67-
%10 = sext i32 %.07 to i64
68-
%gep6 = getelementptr float, ptr %invariant.gep5, i64 %10
69-
%11 = load float, ptr %gep6, align 4
70-
%12 = fcmp contract olt float %9, %11
71-
%13 = trunc nsw i64 %indvars.iv.next to i32
72-
%.1 = select i1 %12, i32 %13, i32 %.07
73-
%14 = add nsw i64 %8, -1
74-
%15 = icmp sgt i64 %8, 1
75-
br i1 %15, label %.lr.ph, label %._crit_edge.loopexit
62+
loop: ; preds = %loop.preheader, %loop
63+
%iv = phi i64 [ %last_index_sext, %loop.preheader ], [ %iv.next, %loop ]
64+
%dec_iv = phi i64 [ %dec, %loop ], [ %diff, %loop.preheader ]
65+
%index = phi i32 [ %select, %loop ], [ %last_index, %loop.preheader ]
66+
%iv.next = add nsw i64 %iv, -1
67+
%load1_ptr = getelementptr float, ptr %first_ptr, i64 %iv
68+
%load1 = load float, ptr %load1_ptr, align 4
69+
%index_sext = sext i32 %index to i64
70+
%load2_ptr = getelementptr float, ptr %second_ptr, i64 %index_sext
71+
%load2 = load float, ptr %load2_ptr, align 4
72+
%cmp = fcmp contract olt float %load1, %load2
73+
%iv.next.trunc = trunc nsw i64 %iv.next to i32
74+
%select = select i1 %cmp, i32 %iv.next.trunc, i32 %index
75+
%dec = add nsw i64 %dec_iv, -1
76+
%loop_cond = icmp sgt i64 %dec_iv, 1
77+
br i1 %loop_cond, label %loop, label %._crit_edge.loopexit
7678

77-
._crit_edge.loopexit: ; preds = %.lr.ph
78-
%.1.lcssa = phi i32 [ %.1, %.lr.ph ]
79+
._crit_edge.loopexit: ; preds = %loop
80+
%select.lcssa = phi i32 [ %select, %loop ]
7981
br label %._crit_edge
8082

8183
._crit_edge: ; preds = %._crit_edge.loopexit, %0
82-
%.0.lcssa = phi i32 [ %.0.val1, %0 ], [ %.1.lcssa, %._crit_edge.loopexit ]
83-
ret i32 %.0.lcssa
84+
%last_index_ret = phi i32 [ %last_index, %entry ], [ %select.lcssa, %._crit_edge.loopexit ]
85+
ret i32 %last_index_ret
8486
}

0 commit comments

Comments
 (0)