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| 1 | +// RUN: mlir-opt -convert-to-spirv="run-signature-conversion=false run-vector-unrolling=false" -cse %s | FileCheck %s |
| 2 | + |
| 3 | +module attributes { |
| 4 | + spirv.target_env = #spirv.target_env< |
| 5 | + #spirv.vce<v1.0, [Shader], [SPV_KHR_storage_buffer_storage_class]>, #spirv.resource_limits<>> |
| 6 | +} { |
| 7 | + |
| 8 | +// CHECK-LABEL: @load_store_float_rank_zero |
| 9 | +// CHECK-SAME: %[[ARG0:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<1 x f32, stride=4> [0])>, StorageBuffer>, %[[ARG1:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<1 x f32, stride=4> [0])>, StorageBuffer> |
| 10 | +// CHECK: %[[CST0:.*]] = spirv.Constant 0 : i32 |
| 11 | +// CHECK: %[[AC0:.*]] = spirv.AccessChain %[[ARG0]][%[[CST0]], %[[CST0]]] : !spirv.ptr<!spirv.struct<(!spirv.array<1 x f32, stride=4> [0])>, StorageBuffer>, i32, i32 |
| 12 | +// CHECK: %[[LOAD:.*]] = spirv.Load "StorageBuffer" %[[AC0]] : f32 |
| 13 | +// CHECK: %[[AC1:.*]] = spirv.AccessChain %[[ARG1]][%[[CST0]], %[[CST0]]] : !spirv.ptr<!spirv.struct<(!spirv.array<1 x f32, stride=4> [0])>, StorageBuffer>, i32, i32 |
| 14 | +// CHECK: spirv.Store "StorageBuffer" %[[AC1]], %[[LOAD]] : f32 |
| 15 | +// CHECK: spirv.Return |
| 16 | +func.func @load_store_float_rank_zero(%arg0: memref<f32>, %arg1: memref<f32>) { |
| 17 | + %0 = memref.load %arg0[] : memref<f32> |
| 18 | + memref.store %0, %arg1[] : memref<f32> |
| 19 | + return |
| 20 | +} |
| 21 | + |
| 22 | +// CHECK-LABEL: @load_store_int_rank_one |
| 23 | +// CHECK-SAME: %[[ARG0:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<4 x i32, stride=4> [0])>, StorageBuffer>, %[[ARG1:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<4 x i32, stride=4> [0])>, StorageBuffer>, %[[ARG2:.*]]: i32 |
| 24 | +// CHECK: %[[CST0:.*]] = spirv.Constant 0 : i32 |
| 25 | +// CHECK: %[[AC0:.*]] = spirv.AccessChain %[[ARG0]][%[[CST0]], %[[ARG2]]] : !spirv.ptr<!spirv.struct<(!spirv.array<4 x i32, stride=4> [0])>, StorageBuffer>, i32, i32 |
| 26 | +// CHECK: %[[LOAD:.*]] = spirv.Load "StorageBuffer" %[[AC0]] : i32 |
| 27 | +// CHECK: %[[AC1:.*]] = spirv.AccessChain %[[ARG1]][%[[CST0]], %[[ARG2]]] : !spirv.ptr<!spirv.struct<(!spirv.array<4 x i32, stride=4> [0])>, StorageBuffer>, i32, i32 |
| 28 | +// CHECK: spirv.Store "StorageBuffer" %[[AC1]], %[[LOAD]] : i32 |
| 29 | +// CHECK: spirv.Return |
| 30 | +func.func @load_store_int_rank_one(%arg0: memref<4xi32>, %arg1: memref<4xi32>, %arg2 : index) { |
| 31 | + %0 = memref.load %arg0[%arg2] : memref<4xi32> |
| 32 | + memref.store %0, %arg1[%arg2] : memref<4xi32> |
| 33 | + return |
| 34 | +} |
| 35 | + |
| 36 | +// CHECK-LABEL: @load_store_larger_memref |
| 37 | +// CHECK-SAME: %[[ARG0:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<8 x i32, stride=4> [0])>, StorageBuffer>, %[[ARG1:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<8 x i32, stride=4> [0])>, StorageBuffer>, %[[ARG2:.*]]: i32 |
| 38 | +// CHECK: %[[CST0:.*]] = spirv.Constant 0 : i32 |
| 39 | +// CHECK: %[[AC0:.*]] = spirv.AccessChain %[[ARG0]][%[[CST0]], %[[ARG2]]] : !spirv.ptr<!spirv.struct<(!spirv.array<8 x i32, stride=4> [0])>, StorageBuffer>, i32, i32 |
| 40 | +// CHECK: %[[LOAD:.*]] = spirv.Load "StorageBuffer" %[[AC0]] : i32 |
| 41 | +// CHECK: %[[AC1:.*]] = spirv.AccessChain %[[ARG1]][%[[CST0]], %[[ARG2]]] : !spirv.ptr<!spirv.struct<(!spirv.array<8 x i32, stride=4> [0])>, StorageBuffer>, i32, i32 |
| 42 | +// CHECK: spirv.Store "StorageBuffer" %[[AC1]], %[[LOAD]] : i32 |
| 43 | +// CHECK: spirv.Return |
| 44 | +func.func @load_store_larger_memref(%arg0: memref<8xi32>, %arg1: memref<8xi32>, %arg2 : index) { |
| 45 | + %0 = memref.load %arg0[%arg2] : memref<8xi32> |
| 46 | + memref.store %0, %arg1[%arg2] : memref<8xi32> |
| 47 | + return |
| 48 | +} |
| 49 | + |
| 50 | + |
| 51 | +// CHECK-LABEL: @load_store_vector |
| 52 | +// CHECK-SAME: %[[ARG0:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<1 x vector<4xi32>, stride=16> [0])>, StorageBuffer>, %[[ARG1:.*]]: !spirv.ptr<!spirv.struct<(!spirv.array<1 x vector<4xi32>, stride=16> [0])>, StorageBuffer> |
| 53 | +// CHECK: %[[CST0:.*]] = spirv.Constant 0 : i32 |
| 54 | +// CHECK: %[[AC0:.*]] = spirv.AccessChain %[[ARG0]][%[[CST0]], %[[CST0]]] : !spirv.ptr<!spirv.struct<(!spirv.array<1 x vector<4xi32>, stride=16> [0])>, StorageBuffer>, i32, i32 |
| 55 | +// CHECK: %[[LOAD:.*]] = spirv.Load "StorageBuffer" %[[AC0]] : vector<4xi32> |
| 56 | +// CHECK: %[[AC1:.*]] = spirv.AccessChain %[[ARG1]][%[[CST0]], %[[CST0]]] : !spirv.ptr<!spirv.struct<(!spirv.array<1 x vector<4xi32>, stride=16> [0])>, StorageBuffer>, i32, i32 |
| 57 | +// CHECK: spirv.Store "StorageBuffer" %[[AC1]], %[[LOAD]] : vector<4xi32> |
| 58 | +// CHECK: spirv.Return |
| 59 | +func.func @load_store_vector(%arg0: memref<vector<4xi32>>, %arg1: memref<vector<4xi32>>) { |
| 60 | + %0 = memref.load %arg0[] : memref<vector<4xi32>> |
| 61 | + memref.store %0, %arg1[] : memref<vector<4xi32>> |
| 62 | + return |
| 63 | +} |
| 64 | + |
| 65 | +} // end module |
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